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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 187701FB57 X-Spam-Score: -4.50 X-Spam-Level: X-Spam-Flag: NO X-Spamd-Result: default: False [-4.50 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; XM_UA_NO_VERSION(0.01)[]; MX_GOOD(-0.01)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; ARC_NA(0.00)[]; FREEMAIL_TO(0.00)[gmail.com]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FREEMAIL_CC(0.00)[amd.com,gmail.com,ffwll.ch,lists.freedesktop.org,vger.kernel.org]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCPT_COUNT_SEVEN(0.00)[9]; DKIM_TRACE(0.00)[suse.de:+]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns,suse.de:dkim] X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org Hi please squash patches 2 to 7 into a single patch that goes first. Am 24.06.24 um 17:10 schrieb Wu Hoi Pok: > Please refer to patch 1. That's not a commit message. Once a patchset landed, no one will know what patch 1 was. Best regards Thomas > > Signed-off-by: Wu Hoi Pok > --- > drivers/gpu/drm/radeon/atombios_encoders.c | 2 +- > drivers/gpu/drm/radeon/cik.c | 14 ++++++------- > drivers/gpu/drm/radeon/dce6_afmt.c | 2 +- > drivers/gpu/drm/radeon/evergreen.c | 12 +++++------ > drivers/gpu/drm/radeon/ni.c | 2 +- > drivers/gpu/drm/radeon/r100.c | 24 +++++++++++----------- > 6 files changed, 28 insertions(+), 28 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c > index 03e6871b3065..c82e0fbc49b4 100644 > --- a/drivers/gpu/drm/radeon/atombios_encoders.c > +++ b/drivers/gpu/drm/radeon/atombios_encoders.c > @@ -2179,7 +2179,7 @@ int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder, int fe_idx) > void > radeon_atom_encoder_init(struct radeon_device *rdev) > { > - struct drm_device *dev = rdev->ddev; > + struct drm_device *dev = rdev_to_drm(rdev); > struct drm_encoder *encoder; > > list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { > diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c > index b5e96a8fc2c1..11a492f21157 100644 > --- a/drivers/gpu/drm/radeon/cik.c > +++ b/drivers/gpu/drm/radeon/cik.c > @@ -7585,7 +7585,7 @@ int cik_irq_process(struct radeon_device *rdev) > DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); > > if (rdev->irq.crtc_vblank_int[0]) { > - drm_handle_vblank(rdev->ddev, 0); > + drm_handle_vblank(rdev_to_drm(rdev), 0); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -7615,7 +7615,7 @@ int cik_irq_process(struct radeon_device *rdev) > DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); > > if (rdev->irq.crtc_vblank_int[1]) { > - drm_handle_vblank(rdev->ddev, 1); > + drm_handle_vblank(rdev_to_drm(rdev), 1); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -7645,7 +7645,7 @@ int cik_irq_process(struct radeon_device *rdev) > DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); > > if (rdev->irq.crtc_vblank_int[2]) { > - drm_handle_vblank(rdev->ddev, 2); > + drm_handle_vblank(rdev_to_drm(rdev), 2); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -7675,7 +7675,7 @@ int cik_irq_process(struct radeon_device *rdev) > DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); > > if (rdev->irq.crtc_vblank_int[3]) { > - drm_handle_vblank(rdev->ddev, 3); > + drm_handle_vblank(rdev_to_drm(rdev), 3); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -7705,7 +7705,7 @@ int cik_irq_process(struct radeon_device *rdev) > DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); > > if (rdev->irq.crtc_vblank_int[4]) { > - drm_handle_vblank(rdev->ddev, 4); > + drm_handle_vblank(rdev_to_drm(rdev), 4); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -7735,7 +7735,7 @@ int cik_irq_process(struct radeon_device *rdev) > DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); > > if (rdev->irq.crtc_vblank_int[5]) { > - drm_handle_vblank(rdev->ddev, 5); > + drm_handle_vblank(rdev_to_drm(rdev), 5); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -8581,7 +8581,7 @@ int cik_init(struct radeon_device *rdev) > /* Initialize surface registers */ > radeon_surface_init(rdev); > /* Initialize clocks */ > - radeon_get_clock_info(rdev->ddev); > + radeon_get_clock_info(rdev_to_drm(rdev)); > > /* Fence driver */ > radeon_fence_driver_init(rdev); > diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c > index 4c06f47453fd..d6ab93ed9ec4 100644 > --- a/drivers/gpu/drm/radeon/dce6_afmt.c > +++ b/drivers/gpu/drm/radeon/dce6_afmt.c > @@ -91,7 +91,7 @@ struct r600_audio_pin *dce6_audio_get_pin(struct radeon_device *rdev) > pin = &rdev->audio.pin[i]; > pin_count = 0; > > - list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { > + list_for_each_entry(encoder, &rdev_to_drm(rdev)->mode_config.encoder_list, head) { > if (radeon_encoder_is_digital(encoder)) { > radeon_encoder = to_radeon_encoder(encoder); > dig = radeon_encoder->enc_priv; > diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c > index c634dc28e6c3..bc4ab71613a5 100644 > --- a/drivers/gpu/drm/radeon/evergreen.c > +++ b/drivers/gpu/drm/radeon/evergreen.c > @@ -1673,7 +1673,7 @@ void evergreen_pm_misc(struct radeon_device *rdev) > */ > void evergreen_pm_prepare(struct radeon_device *rdev) > { > - struct drm_device *ddev = rdev->ddev; > + struct drm_device *ddev = rdev_to_drm(rdev); > struct drm_crtc *crtc; > struct radeon_crtc *radeon_crtc; > u32 tmp; > @@ -1698,7 +1698,7 @@ void evergreen_pm_prepare(struct radeon_device *rdev) > */ > void evergreen_pm_finish(struct radeon_device *rdev) > { > - struct drm_device *ddev = rdev->ddev; > + struct drm_device *ddev = rdev_to_drm(rdev); > struct drm_crtc *crtc; > struct radeon_crtc *radeon_crtc; > u32 tmp; > @@ -1763,7 +1763,7 @@ void evergreen_hpd_set_polarity(struct radeon_device *rdev, > */ > void evergreen_hpd_init(struct radeon_device *rdev) > { > - struct drm_device *dev = rdev->ddev; > + struct drm_device *dev = rdev_to_drm(rdev); > struct drm_connector *connector; > unsigned enabled = 0; > u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) | > @@ -1804,7 +1804,7 @@ void evergreen_hpd_init(struct radeon_device *rdev) > */ > void evergreen_hpd_fini(struct radeon_device *rdev) > { > - struct drm_device *dev = rdev->ddev; > + struct drm_device *dev = rdev_to_drm(rdev); > struct drm_connector *connector; > unsigned disabled = 0; > > @@ -4753,7 +4753,7 @@ int evergreen_irq_process(struct radeon_device *rdev) > event_name = "vblank"; > > if (rdev->irq.crtc_vblank_int[crtc_idx]) { > - drm_handle_vblank(rdev->ddev, crtc_idx); > + drm_handle_vblank(rdev_to_drm(rdev), crtc_idx); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -5211,7 +5211,7 @@ int evergreen_init(struct radeon_device *rdev) > /* Initialize surface registers */ > radeon_surface_init(rdev); > /* Initialize clocks */ > - radeon_get_clock_info(rdev->ddev); > + radeon_get_clock_info(rdev_to_drm(rdev)); > /* Fence driver */ > radeon_fence_driver_init(rdev); > /* initialize AGP */ > diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c > index 77aee99e473a..3890911fe693 100644 > --- a/drivers/gpu/drm/radeon/ni.c > +++ b/drivers/gpu/drm/radeon/ni.c > @@ -2360,7 +2360,7 @@ int cayman_init(struct radeon_device *rdev) > /* Initialize surface registers */ > radeon_surface_init(rdev); > /* Initialize clocks */ > - radeon_get_clock_info(rdev->ddev); > + radeon_get_clock_info(rdev_to_drm(rdev)); > /* Fence driver */ > radeon_fence_driver_init(rdev); > /* initialize memory controller */ > diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c > index 0b1e19345f43..d7d7d23bf9a1 100644 > --- a/drivers/gpu/drm/radeon/r100.c > +++ b/drivers/gpu/drm/radeon/r100.c > @@ -459,7 +459,7 @@ void r100_pm_misc(struct radeon_device *rdev) > */ > void r100_pm_prepare(struct radeon_device *rdev) > { > - struct drm_device *ddev = rdev->ddev; > + struct drm_device *ddev = rdev_to_drm(rdev); > struct drm_crtc *crtc; > struct radeon_crtc *radeon_crtc; > u32 tmp; > @@ -490,7 +490,7 @@ void r100_pm_prepare(struct radeon_device *rdev) > */ > void r100_pm_finish(struct radeon_device *rdev) > { > - struct drm_device *ddev = rdev->ddev; > + struct drm_device *ddev = rdev_to_drm(rdev); > struct drm_crtc *crtc; > struct radeon_crtc *radeon_crtc; > u32 tmp; > @@ -603,7 +603,7 @@ void r100_hpd_set_polarity(struct radeon_device *rdev, > */ > void r100_hpd_init(struct radeon_device *rdev) > { > - struct drm_device *dev = rdev->ddev; > + struct drm_device *dev = rdev_to_drm(rdev); > struct drm_connector *connector; > unsigned enable = 0; > > @@ -626,7 +626,7 @@ void r100_hpd_init(struct radeon_device *rdev) > */ > void r100_hpd_fini(struct radeon_device *rdev) > { > - struct drm_device *dev = rdev->ddev; > + struct drm_device *dev = rdev_to_drm(rdev); > struct drm_connector *connector; > unsigned disable = 0; > > @@ -798,7 +798,7 @@ int r100_irq_process(struct radeon_device *rdev) > /* Vertical blank interrupts */ > if (status & RADEON_CRTC_VBLANK_STAT) { > if (rdev->irq.crtc_vblank_int[0]) { > - drm_handle_vblank(rdev->ddev, 0); > + drm_handle_vblank(rdev_to_drm(rdev), 0); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -807,7 +807,7 @@ int r100_irq_process(struct radeon_device *rdev) > } > if (status & RADEON_CRTC2_VBLANK_STAT) { > if (rdev->irq.crtc_vblank_int[1]) { > - drm_handle_vblank(rdev->ddev, 1); > + drm_handle_vblank(rdev_to_drm(rdev), 1); > rdev->pm.vblank_sync = true; > wake_up(&rdev->irq.vblank_queue); > } > @@ -1471,7 +1471,7 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p) > header = radeon_get_ib_value(p, h_idx); > crtc_id = radeon_get_ib_value(p, h_idx + 5); > reg = R100_CP_PACKET0_GET_REG(header); > - crtc = drm_crtc_find(p->rdev->ddev, p->filp, crtc_id); > + crtc = drm_crtc_find(rdev_to_drm(p->rdev), p->filp, crtc_id); > if (!crtc) { > DRM_ERROR("cannot find crtc %d\n", crtc_id); > return -ENOENT; > @@ -3059,7 +3059,7 @@ DEFINE_SHOW_ATTRIBUTE(r100_debugfs_mc_info); > void r100_debugfs_rbbm_init(struct radeon_device *rdev) > { > #if defined(CONFIG_DEBUG_FS) > - struct dentry *root = rdev->ddev->primary->debugfs_root; > + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; > > debugfs_create_file("r100_rbbm_info", 0444, root, rdev, > &r100_debugfs_rbbm_info_fops); > @@ -3069,7 +3069,7 @@ void r100_debugfs_rbbm_init(struct radeon_device *rdev) > void r100_debugfs_cp_init(struct radeon_device *rdev) > { > #if defined(CONFIG_DEBUG_FS) > - struct dentry *root = rdev->ddev->primary->debugfs_root; > + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; > > debugfs_create_file("r100_cp_ring_info", 0444, root, rdev, > &r100_debugfs_cp_ring_info_fops); > @@ -3081,7 +3081,7 @@ void r100_debugfs_cp_init(struct radeon_device *rdev) > void r100_debugfs_mc_info_init(struct radeon_device *rdev) > { > #if defined(CONFIG_DEBUG_FS) > - struct dentry *root = rdev->ddev->primary->debugfs_root; > + struct dentry *root = rdev_to_drm(rdev)->primary->debugfs_root; > > debugfs_create_file("r100_mc_info", 0444, root, rdev, > &r100_debugfs_mc_info_fops); > @@ -3947,7 +3947,7 @@ int r100_resume(struct radeon_device *rdev) > RREG32(R_0007C0_CP_STAT)); > } > /* post */ > - radeon_combios_asic_init(rdev->ddev); > + radeon_combios_asic_init(rdev_to_drm(rdev)); > /* Resume clock after posting */ > r100_clock_startup(rdev); > /* Initialize surface registers */ > @@ -4056,7 +4056,7 @@ int r100_init(struct radeon_device *rdev) > /* Set asic errata */ > r100_errata(rdev); > /* Initialize clocks */ > - radeon_get_clock_info(rdev->ddev); > + radeon_get_clock_info(rdev_to_drm(rdev)); > /* initialize AGP */ > if (rdev->flags & RADEON_IS_AGP) { > r = radeon_agp_init(rdev); -- -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Frankenstrasse 146, 90461 Nuernberg, Germany GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman HRB 36809 (AG Nuernberg)