From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E09063E4C84 for ; Fri, 10 Jul 2026 08:03:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783670596; cv=none; b=S4W6rx/S202KPDtfp6hheISttqYbsAA2Ih9nYxfD/bcy8tTbEZqb6nlLq8QBH+R8jwR17O7YiJW/B3PTGKGm1YtreBvJNjLI+/oYDjEQkMIrm4qp+tXYBMoFqMYPkjR0Br29TQjgBPhZAi3GFzasGZl37VrTl+TqsgsyFuL6BmM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783670596; c=relaxed/simple; bh=y12FK78HOF/lQqaxISvOEio2cPxP0WLPvSnfZO0AC50=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=ldcl6VGMBK+8dEuEeVeD0zg6YyWtFxzOYNljCJzTa4VCz/zN9pIKuFO9QMNgonIJ/bVt6nOTmtRgsJ4uy5FTcMOi1rqr/0fx1NrEQkX6HX+wO0kXWe23/TgV0jPEfCjZMOWZl1E5/ldke14HSWgYyFasKkZ6gHMdviua5r6/msc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=[IPv6:::1]) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1wi6CG-0006bu-4R; Fri, 10 Jul 2026 10:02:56 +0200 Message-ID: Subject: Re: [PATCH 2/2] drm/etnaviv: Add GPU reset counters From: Lucas Stach To: Christian Gmeiner , Russell King , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel-dev@igalia.com, Christian Gmeiner Date: Fri, 10 Jul 2026 10:02:55 +0200 In-Reply-To: <20260709-etnaviv-reset-notification-v1-2-64c617496958@igalia.com> References: <20260709-etnaviv-reset-notification-v1-0-64c617496958@igalia.com> <20260709-etnaviv-reset-notification-v1-2-64c617496958@igalia.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.60.1 (3.60.1-1.fc44) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Hi Christian, Am Donnerstag, dem 09.07.2026 um 16:57 +0200 schrieb Christian Gmeiner: > From: Christian Gmeiner >=20 > The OpenGL and Vulkan robustness extensions let an application detect a > GPU reset and check if its own context caused it, so the application can > drop the broken context and build a new one. The kernel knows both > facts, but etnaviv has no way to report them to userspace. >=20 > Add two counters and expose them through GET_PARAM: a per-GPU counter > that counts every reset of that GPU, and a per-context counter that only > counts the resets this context was guilty of. Userspace compares the > counters with saved values: if the context counter moved the context was > guilty, if only the GPU counter moved the context was an innocent > victim. >=20 > The GPU counter is per GPU core and not per device, so a hang on one > pipe does not look like an innocent reset to contexts that only use > another pipe. >=20 > Bump the driver minor version so userspace can detect the feature. >=20 > Signed-off-by: Christian Gmeiner > --- > drivers/gpu/drm/etnaviv/etnaviv_drv.c | 5 +++-- > drivers/gpu/drm/etnaviv/etnaviv_drv.h | 1 + > drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 12 +++++++++++- > drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 6 +++++- > drivers/gpu/drm/etnaviv/etnaviv_sched.c | 3 +++ > include/uapi/drm/etnaviv_drm.h | 2 ++ > 6 files changed, 25 insertions(+), 4 deletions(-) >=20 [...] > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etna= viv/etnaviv_gpu.h > index 5cb46c84e03a..a5d7c2158eb5 100644 > --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h > +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h > @@ -148,6 +148,8 @@ struct etnaviv_gpu { > u32 hangcheck_primid; > u32 hangcheck_fence; > =20 > + atomic_t reset_counter; > + > void __iomem *mmio; > int irq; > =20 > @@ -204,7 +206,9 @@ static inline u32 gpu_read_power(struct etnaviv_gpu *= gpu, u32 reg) > return readl(gpu->mmio + gpu_fix_power_address(gpu, reg)); > } > =20 > -int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value= ); > +int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, > + struct etnaviv_file_private *ctx, > + u32 param, u64 *value); > =20 > int etnaviv_gpu_init(struct etnaviv_gpu *gpu); > bool etnaviv_fill_identity_from_hwdb(struct etnaviv_gpu *gpu); > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c b/drivers/gpu/drm/et= naviv/etnaviv_sched.c > index 139e6e38784b..398608009924 100644 > --- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c > +++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c > @@ -79,6 +79,9 @@ static enum drm_gpu_sched_stat etnaviv_sched_timedout_j= ob(struct drm_sched_job > if(sched_job) > drm_sched_increase_karma(sched_job); > =20 > + atomic_inc(&gpu->reset_counter); > + atomic_inc(&submit->ctx->reset_counter); > + There is no reason for those to be atomics. We only have a single submission channel per GPU, so there can never be more than a single timeout handler active at the same time, so those variables can be plain ints. Regards, Lucas