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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35dbe9377b7sm8548259a91.10.2026.04.01.21.18.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Apr 2026 21:19:00 -0700 (PDT) Message-ID: Date: Thu, 2 Apr 2026 12:18:56 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] spmi: spmi-pmic-arb: add support for PMIC arbiter v8.5 To: Dmitry Baryshkov Cc: Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Subbaraman Narayanamurthy , David Collins , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@oss.qualcomm.com References: <20260401-hawi-spmi-v1-0-c40963041078@oss.qualcomm.com> <20260401-hawi-spmi-v1-2-c40963041078@oss.qualcomm.com> Content-Language: en-US From: Fenglin Wu In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDAyMDAzNCBTYWx0ZWRfX8O/AmSinYV7U KOgI8rWfmyvZQqYinMjk4ahnl/ZtIgZqQMtdSrRtPNGslWUrh/aX8hn+Pui7L57FDc+UinCBowb b7N2UXoXbO7aUwXuXKqUaMaf6h42GQ7WnVOmxvSXZgZHK7ncz7exWrv5W0N+DS4NQ4s2+zzK/ut ecxIgVuzxUOtBGcAQo7WiAzATx9vfE0YgCamPA2v0oJrlVhR4AY9X78BxEy7cW5Seys0TPgu/ii 1pLhPIC20Lyk7ijL7UzrXVR7nusQ2gsV64CGkQzTycpYHdHjrSWFSkj1+gauZ/8ySN1wE65xS9K 3SRCMv9Y4Rl57qr23BseiIHAIb66qz4pN84sYSlQLRVCNUaXG0R8sV0FcCOzBF/VodmCFgwRzaa cMrDyBjk5XxgJJQxrvGK2+D0fR48CMSNs7ba3umk6D+fVbaNcwiCrzVp+UGTIbsC1bkZMUq3MkH IDlWnLyd+Xv/9Sbj2GA== X-Authority-Analysis: v=2.4 cv=QJJlhwLL c=1 sm=1 tr=0 ts=69cdee35 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=0XuG8Arr-fMTETogzHMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-GUID: ErS5kQvOpQxvED2W6pPHfaHxsvKK3Doo X-Proofpoint-ORIG-GUID: ErS5kQvOpQxvED2W6pPHfaHxsvKK3Doo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-02_01,2026-04-01_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604020034 On 4/1/2026 7:22 PM, Dmitry Baryshkov wrote: > On Wed, Apr 01, 2026 at 02:41:24AM -0700, Fenglin Wu wrote: >> PMIC arbiter v8.5 is an extension of PMIC arbiter v8 that updated >> the definition of the channel status register bit fields. Add support >> to handle this difference. >> >> Signed-off-by: Fenglin Wu >> --- >> drivers/spmi/spmi-pmic-arb.c | 69 ++++++++++++++++++++++++++++++++++++++------ >> 1 file changed, 60 insertions(+), 9 deletions(-) >> >> diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c >> index 69f8d456324a..deeaa39bb647 100644 >> --- a/drivers/spmi/spmi-pmic-arb.c >> +++ b/drivers/spmi/spmi-pmic-arb.c >> @@ -28,6 +28,7 @@ >> #define PMIC_ARB_VERSION_V5_MIN 0x50000000 >> #define PMIC_ARB_VERSION_V7_MIN 0x70000000 >> #define PMIC_ARB_VERSION_V8_MIN 0x80000000 >> +#define PMIC_ARB_VERSION_V8P5_MIN 0x80050000 >> #define PMIC_ARB_INT_EN 0x0004 >> >> #define PMIC_ARB_FEATURES 0x0004 >> @@ -63,11 +64,34 @@ >> #define SPMI_OWNERSHIP_PERIPH2OWNER(X) ((X) & 0x7) >> >> /* Channel Status fields */ >> -enum pmic_arb_chnl_status { >> - PMIC_ARB_STATUS_DONE = BIT(0), >> - PMIC_ARB_STATUS_FAILURE = BIT(1), >> - PMIC_ARB_STATUS_DENIED = BIT(2), >> - PMIC_ARB_STATUS_DROPPED = BIT(3), >> +struct pmic_arb_chnl_status_mask { >> + u8 done; >> + u8 failure; >> + u8 crc; >> + u8 parity; >> + u8 nack; >> + u8 denied; >> + u8 dropped; >> +}; >> + >> +static const struct pmic_arb_chnl_status_mask chnl_status_mask = { >> + .done = BIT(0), >> + .failure = BIT(1), >> + .crc = 0, >> + .parity = 0, >> + .nack = 0, >> + .denied = BIT(2), >> + .dropped = BIT(3), >> +}; >> + >> +static const struct pmic_arb_chnl_status_mask chnl_status_mask_v8p5 = { >> + .done = BIT(0), >> + .failure = BIT(1), >> + .crc = BIT(2), >> + .parity = BIT(3), >> + .nack = BIT(4), >> + .denied = BIT(5), >> + .dropped = BIT(6), > Would it be better to extract generation-specific callback to decode the > error rather than defining the list of masks? Are you proposing to add a callback in pmic_arb_ver_ops, like '*check_chnl_status', and create separate implementations for PMIC arbiter versions before and after v8.5? This approach would add more extensive code changes with some code duplication, especially for handling common error bits shared across all versions—even if they only print error messages and return an error code. Is that a concern? Fenglin