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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 26blFwjD6NXS5c3i6YLwv2oMpxh0Z9Dk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI0MDA3NiBTYWx0ZWRfX7AGLmsaRgXCP 8nI25nfN87t7KkAuIfxdBVmxDKl5Rfq87nrrhSEbUmYz0a5lL2I/F07glcYHIzcHY5naz6QQGfA ruoAawzmfprIrQp+OT/+nsX3uruycuefoRjkPTxq2yBv3oZOSfXQasxqWpF+knjatNDxL3YJsU7 4TyRDh7TErCNaiO8KOU0+jlaYeDfNGoS1HQ5SYP4Dc0vFZ8iJlJY1N+9Vz1exLYC672+TeNXd7c VMXD/Ipwn31ctoqhgwGRp92jvytlgqzTksuzBBonb+0Wkmx0G6vkv/o2eQ6ZZXW55ifwKBYB7Sw mtMy6BXCWvPk+iZ6ApBEJlkyuTq6MntbwnUhVsg5S99viQn//8ZPr5j1JRn45LtAqBw9NLcE9o8 UxzgX1M+KgUoWaIzLdwijhJ+XJQyqHqrkeHtErWUxjCfHuJwZFlSfl1GArJAaqbQFnf/IQZOzdg NrjYRNpfnMih3cqwPzw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI0MDA3NiBTYWx0ZWRfXzUA+N7ylQo/n /d6lBed1vdjM/X/hJ/jWlk7UJmywfq1zAoju4KyHdB6d6n2f8fGKrK7fyezSHUYUNvRuhtdnLzq YUqRVP+ZQBvrbRnd7Pji42IhccU+9cI= X-Proofpoint-ORIG-GUID: 26blFwjD6NXS5c3i6YLwv2oMpxh0Z9Dk X-Authority-Analysis: v=2.4 cv=GI+dgeNK c=1 sm=1 tr=0 ts=6ab56dca cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=9WqIVI+dqUtONkXyCURkzg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=5Aoo9DEluPtx4pQJSMQA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-24_04,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 malwarescore=0 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609240076 On 9/23/2026 5:38 PM, Dmitry Baryshkov wrote: > On Wed, Sep 23, 2026 at 04:16:21PM +0530, Arpit Saini wrote: >> Hi Dmitry, >> >> On 9/22/2026 9:33 PM, Dmitry Baryshkov wrote: >>> On Wed, Sep 16, 2026 at 02:41:20PM +0530, Nabige Aala wrote: >>>> From: Arpit Saini >>>> >>>> Enable the Shikra MDSS display subsystem on the Qualcomm >>>> Shikra CQM EVK board and add the DLC0697 MIPI DSI display >>>> panel node. Pin pm4125_l5 to 1.232V with regulator-allow-set-load >>>> for DSI PHY PLL stability. >>>> >>>> Signed-off-by: Arpit Saini >>>> Signed-off-by: Nabige Aala >>>> --- >>>> arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 118 ++++++++++++++++++++++++++++ >>>> 1 file changed, 118 insertions(+) >>>> >>>> + >>>> +&mdss_dsi0 { >>>> + vdda-supply = <&pm4125_l5>; >>>> + >>>> + status = "okay"; >>>> + >>>> + panel@0 { >>>> + compatible = "dlc,dlc0697", "ilitek,ili7807s"; >>>> + reg = <0>; >>>> + >>>> + reset-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; >>>> + >>>> + vddi-supply = <&pm4125_l15>; >>>> + avdd-supply = <&vreg_disp_p>; >>>> + avee-supply = <&vreg_disp_n>; >>>> + >>>> + pinctrl-0 = <&panel_rst_n &panel_te_pin &panel_bl_en>; >>> >>> As far as I remember, your panel_bl_en enables an external regulator. >>> Why is it not described in this way? >>> >> >> panel_bl_en is a Qcom's daughter card specific platform signal , it does not feed into the panel. >> >> It is a board-level GPIO on the CQM EVK daughter card used purely for >> platform power sequencing. >> >> Adding panel_bl_en as an external regulator would be misleading and incorrect from a hardware perspective, >> as it is not directly going into the panel. > > Well... Aren't VREG_WLED and WLED_SIN1 / SIN2 directly going to the > panel? > >> >> for the CQM EVK, the backlight is MIPI DCS driven and panel_bl_en is a >> platform-specific sequencing pin, making pinctrl states the >> appropriate binding here. >> >> Could you please take a look at earlier discussion we had and let us know your thoughts ? >> >> https://lore.kernel.org/all/29ca6303-4368-4aeb-b82f-039aa252780a@oss.qualcomm.com/ > > Exactly. The diagram there shows that GPIO 91 (panel_bl_en) is an enable > signal for the WLED regulator, whose output is then fed to the panel. > Hi Dmitry Based on your feedback, I understand that the daughter-card WLED circuit should be modelled as a regulator-controlled device. I am planning the following implementation: vreg_wled: regulator-wled { compatible = "regulator-fixed"; regulator-name = "vreg_wled"; gpio = <&tlmm 91 GPIO_ACTIVE_HIGH>; enable-active-high; }; The panel node will reference it as: wled-supply = <&vreg_wled>; In the panel driver, I will add wled to the existing bulk supply list: static const struct regulator_bulk_data ili7807s_supplies[] = { { .supply = "vddi" }, { .supply = "avdd" }, { .supply = "avee" }, { .supply = "wled" }, }; The existing regulator_bulk_enable() and regulator_bulk_disable() calls in prepare() and unprepare() will then control GPIO 91 through the fixed regulator. Brightness will continue to be controlled through the panel's DCS backlight implementation: wled-supply controls the WLED driver's enable signal. The DCS backlight controls brightness through the panel CABC/PWM output. panel_bl_en and panel_bl_suspend pinctrl states will be removed. Could you please confirm whether this modelling and driver sequence match your expectations? Thanks, Arpit