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From: Paolo Bonzini <pbonzini@redhat.com>
To: Jim Mattson <jmattson@google.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	kvm list <kvm@vger.kernel.org>,
	David Hildenbrand <david@redhat.com>
Subject: Re: [PATCH 2/3] KVM: vmx: simplify MSR bitmap setup
Date: Wed, 20 Dec 2017 22:13:46 +0100	[thread overview]
Message-ID: <c6dcdc22-8ab5-84f7-f441-38fc695c07f4@redhat.com> (raw)
In-Reply-To: <CALMp9eR8_rwuvM2f9ya-GSNBpiYWHYSuJ505umaj5O=hOuAAOA@mail.gmail.com>

On 20/12/2017 20:40, Jim Mattson wrote:
> This doesn't look right to me. Without APIC-register virtualization,
> the only X2APIC MSR intercept that should be disabled is TPR.

Of course...  The bitmap that has to be outside the "if" is
*_x2apic_apicv, not *_x2apic.  I sent the wrong version of the series
(and this was the only difference, together s/superset/subset/ in the
commit message).  Will resend tomorrow.

Paolo

> On Wed, Dec 20, 2017 at 4:05 AM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> The APICv-enabled MSR bitmap is a superset of the APICv-disabled bitmap.
>> Make that obvious in vmx_disable_intercept_msr_x2apic.
>>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>> ---
>>  arch/x86/kvm/vmx.c | 8 ++------
>>  1 file changed, 2 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index 9f9c3194440f..905aaa778306 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -5263,12 +5263,9 @@ static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_activ
>>                                 msr, type);
>>                 __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic_apicv,
>>                                 msr, type);
>> -       } else {
>> -               __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic,
>> -                               msr, type);
>> -               __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic,
>> -                               msr, type);
>>         }
>> +       __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic, msr, type);
>> +       __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic, msr, type);
>>  }
>>
>>  static bool vmx_get_enable_apicv(struct kvm_vcpu *vcpu)
>> @@ -7148,7 +7145,6 @@ static __init int hardware_setup(void)
>>          * TPR reads and writes can be virtualized even if virtual interrupt
>>          * delivery is not in use.
>>          */
>> -       vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true);
>>         vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
>>
>>         /* EOI */
>> --
>> 1.8.3.1
>>
>>

  reply	other threads:[~2017-12-20 21:18 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-20 12:05 [PATCH 0/3] KVM: vmx: MSR bitmap cleanups and optimizations Paolo Bonzini
2017-12-20 12:05 ` [PATCH 1/3] KVM: vmx: speed up MSR bitmap merge Paolo Bonzini
2017-12-20 18:02   ` Jim Mattson
2017-12-20 12:05 ` [PATCH 2/3] KVM: vmx: simplify MSR bitmap setup Paolo Bonzini
2017-12-20 19:40   ` Jim Mattson
2017-12-20 21:13     ` Paolo Bonzini [this message]
2017-12-20 12:05 ` [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro Paolo Bonzini
2017-12-20 17:07   ` Jim Mattson
2017-12-21 11:50 [PATCH v2 0/3] KVM: vmx: MSR bitmap cleanups and optimizations Paolo Bonzini
2017-12-21 11:51 ` [PATCH 2/3] KVM: vmx: simplify MSR bitmap setup Paolo Bonzini
2017-12-21 18:06   ` Jim Mattson

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