From: Like Xu <like.xu.linux@gmail.com>
To: Liuxiangdong <liuxiangdong5@huawei.com>,
Yang Weijiang <weijiang.yang@intel.com>
Cc: ak@linux.intel.com, jmattson@google.com, joro@8bytes.org,
kan.liang@intel.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, pbonzini@redhat.com,
seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com,
wei.w.wang@intel.com, x86@kernel.org,
"Fangyi (Eric)" <eric.fangyi@huawei.com>,
Xiexiangyou <xiexiangyou@huawei.com>,
alex.shi@linux.alibaba.com
Subject: Re: [PATCH v14 00/11] KVM: x86/pmu: Guest Last Branch Recording Enabling
Date: Fri, 30 Jul 2021 11:28:10 +0800 [thread overview]
Message-ID: <c75f63f8-0274-967b-4431-6ee3c2a40a2f@gmail.com> (raw)
In-Reply-To: <61036EEC.4020006@huawei.com>
On 30/7/2021 11:15 am, Liuxiangdong wrote:
> Hi, like.
>
> Does it have requirement on CPU if we want to use LBR in Guest?
As long as you find valid output from the "dmesg| grep -i LBR" like
"XX-deep LBR",
you can use LBR on the host and theoretically on the most Intel guest.
But I don't have various Intel machine types for testing.
As far as I know, the guest LBR doesn't work on the platforms that
the MSR_LBR_SELECT is defined per physical core not logical core.
I will fix this issue by making KVM aware of the recent core scheduling
policy.
>
> I have tried linux-5.14-rc3 on different CPUs. And I can use lbr on
> Haswell, Broadwell, skylake and icelake, but I cannot use lbr on IvyBridge.
I suppose INTEL_FAM6_IVYBRIDGE and INTEL_FAM6_IVYBRIDGE_X do support LBR.
You may check the return values from x86_perf_get_lbr() or
cpuid_model_is_consistent() in the KVM for more details.
>
> Thanks!
>
>
> On 2021/7/29 20:40, Liuxiangdong wrote:
>> Hi, like.
>>
>> This patch set has been merged in 5.12 kernel tree so we can use LBR
>> in Guest.
>> Does it have requirement on CPU?
>> I can use lbr in guest on skylake and icelake, but cannot on IvyBridge.
>>
>> I can see lbr formats(000011b) in perf_capabilities msr(0x345), but
>> there is still
>> error when I try.
>>
>> $ perf record -b
>> Error:
>> cycles: PMU Hardware doesn't support sampling/overflow-interrupts. Try
>> 'perf stat'
>>
>> Host CPU:
>> Architecture: x86_64
>> CPU op-mode(s): 32-bit, 64-bit
>> Byte Order: Little Endian
>> Address sizes: 46 bits physical, 48 bits virtual
>> CPU(s): 24
>> On-line CPU(s) list: 0-23
>> Thread(s) per core: 2
>> Core(s) per socket: 6
>> Socket(s): 2
>> NUMA node(s): 2
>> Vendor ID: GenuineIntel
>> CPU family: 6
>> Model: 62
>> Model name: Intel(R) Xeon(R) CPU E5-2620 v2 @
>> 2.10GHz
>> Stepping: 4
>>
>>
>> Thanks!
>> Xiangdong Liu
>
next prev parent reply other threads:[~2021-07-30 3:28 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 5:10 Like Xu
2021-02-01 5:10 ` [PATCH v14 01/11] KVM: x86/vmx: Make vmx_set_intercept_for_msr() non-static Like Xu
2021-02-01 5:10 ` [PATCH v14 02/11] KVM: x86/pmu: Set up IA32_PERF_CAPABILITIES if PDCM bit is available Like Xu
2021-02-02 11:48 ` Paolo Bonzini
2021-02-01 5:10 ` [PATCH v14 03/11] KVM: vmx/pmu: Add PMU_CAP_LBR_FMT check when guest LBR is enabled Like Xu
2021-02-02 12:00 ` Paolo Bonzini
2021-02-01 5:10 ` [PATCH v14 04/11] KVM: vmx/pmu: Expose DEBUGCTLMSR_LBR in the MSR_IA32_DEBUGCTLMSR Like Xu
2021-02-01 5:10 ` [PATCH v14 05/11] KVM: vmx/pmu: Create a guest LBR event when vcpu sets DEBUGCTLMSR_LBR Like Xu
2021-02-01 5:10 ` [PATCH v14 06/11] KVM: vmx/pmu: Pass-through LBR msrs when the guest LBR event is ACTIVE Like Xu
2021-02-01 5:10 ` [PATCH v14 07/11] KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation Like Xu
2021-02-01 5:10 ` [PATCH v14 08/11] KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI Like Xu
2021-02-01 5:10 ` [PATCH v14 09/11] KVM: vmx/pmu: Release guest LBR event via lazy release mechanism Like Xu
2021-02-01 5:10 ` [PATCH v14 10/11] KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES Like Xu
2021-02-01 5:10 ` [PATCH v14 11/11] selftests: kvm/x86: add test for pmu msr MSR_IA32_PERF_CAPABILITIES Like Xu
2021-02-01 6:01 ` [PATCH v14 07/11] KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation Like Xu
2021-02-01 6:01 ` [PATCH v14 08/11] KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI Like Xu
2021-02-01 6:01 ` [PATCH v14 09/11] KVM: vmx/pmu: Release guest LBR event via lazy release mechanism Like Xu
2021-02-01 6:01 ` [PATCH v14 10/11] KVM: vmx/pmu: Expose LBR_FMT in the MSR_IA32_PERF_CAPABILITIES Like Xu
2021-02-01 6:01 ` [PATCH v14 11/11] selftests: kvm/x86: add test for pmu msr MSR_IA32_PERF_CAPABILITIES Like Xu
2021-02-02 14:53 ` Paolo Bonzini
2021-02-02 12:37 ` [PATCH v14 00/11] KVM: x86/pmu: Guest Last Branch Recording Enabling Paolo Bonzini
2021-07-29 12:40 ` Liuxiangdong
2021-07-30 3:15 ` Liuxiangdong
2021-07-30 3:28 ` Like Xu [this message]
2022-09-13 23:42 ` Jim Mattson
2022-09-19 7:26 ` Like Xu
2022-09-19 18:08 ` Jim Mattson
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