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Can you please provide feedback with respect to the status of this S32G2/S32G3 DTS patch ? Regards, Ciprian >> --- >>   arch/arm64/boot/dts/freescale/s32g2.dtsi | 8 ++++++++ >>   arch/arm64/boot/dts/freescale/s32g3.dtsi | 9 +++++++++ >>   2 files changed, 17 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/ >> boot/dts/freescale/s32g2.dtsi >> index fa054bfe7d5c..39d12422e3f3 100644 >> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi >> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi >> @@ -114,6 +114,14 @@ soc@0 { >>           #size-cells = <1>; >>           ranges = <0 0 0 0x80000000>; >> +        rtc0: rtc@40060000 { >> +            compatible = "nxp,s32g2-rtc"; >> +            reg = <0x40060000 0x1000>; >> +            interrupts = ; >> +            clocks = <&clks 54>, <&clks 55>; >> +            clock-names = "ipg", "source0"; >> +        }; >> + >>           pinctrl: pinctrl@4009c240 { >>               compatible = "nxp,s32g2-siul2-pinctrl"; >>                   /* MSCR0-MSCR101 registers on siul2_0 */ >> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/ >> boot/dts/freescale/s32g3.dtsi >> index b4226a9143c8..e71b80e048dc 100644 >> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi >> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi >> @@ -171,6 +171,15 @@ soc@0 { >>           #size-cells = <1>; >>           ranges = <0 0 0 0x80000000>; >> +        rtc0: rtc@40060000 { >> +            compatible = "nxp,s32g3-rtc", >> +                     "nxp,s32g2-rtc"; >> +            reg = <0x40060000 0x1000>; >> +            interrupts = ; >> +            clocks = <&clks 54>, <&clks 55>; >> +            clock-names = "ipg", "source0"; >> +        }; >> + >>           pinctrl: pinctrl@4009c240 { >>               compatible = "nxp,s32g2-siul2-pinctrl"; >>                   /* MSCR0-MSCR101 registers on siul2_0 */