From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751515AbdAaSQ7 (ORCPT ); Tue, 31 Jan 2017 13:16:59 -0500 Received: from smtprelay.synopsys.com ([198.182.47.9]:49481 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751017AbdAaSQZ (ORCPT ); Tue, 31 Jan 2017 13:16:25 -0500 Subject: Re: [PATCH v2 1/4] ARCv2: IRQ: Move structure for build register of core intc to the header To: Yuriy Kolerov , References: <1485863124-26426-1-git-send-email-yuriy.kolerov@synopsys.com> <1485863124-26426-2-git-send-email-yuriy.kolerov@synopsys.com> CC: , , , Newsgroups: gmane.linux.kernel.arc,gmane.linux.kernel From: Vineet Gupta Message-ID: Date: Tue, 31 Jan 2017 10:15:36 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <1485863124-26426-2-git-send-email-yuriy.kolerov@synopsys.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.10.161.49] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/31/2017 03:45 AM, Yuriy Kolerov wrote: > Also add new macro ARC_REG_STATUS32 for the address of STATUS32 > auxiliary register. It is better to use it instead of magic numbers. > > Signed-off-by: Yuriy Kolerov > --- > arch/arc/include/asm/arcregs.h | 11 +++++++++++ > arch/arc/kernel/intc-arcv2.c | 10 ++-------- > 2 files changed, 13 insertions(+), 8 deletions(-) > > diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h > index f659942..2328244 100644 > --- a/arch/arc/include/asm/arcregs.h > +++ b/arch/arc/include/asm/arcregs.h > @@ -38,6 +38,9 @@ > #define ARC_REG_CLUSTER_BCR 0xcf > #define ARC_REG_AUX_ICCM 0x208 /* ICCM Base Addr (ARCv2) */ > > +/* Common for ARCompact and ARCv2 status register */ > +#define ARC_REG_STATUS32 0x0A > + > /* status32 Bits Positions */ > #define STATUS_AE_BIT 5 /* Exception active */ > #define STATUS_DE_BIT 6 /* PC is in delay slot */ > @@ -233,6 +236,14 @@ struct bcr_generic { > #endif > }; > > +struct bcr_irq_arcv2 { > +#ifdef CONFIG_CPU_BIG_ENDIAN > + unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8; > +#else > + unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3; > +#endif > +}; Looks like I was too eager to apply. This doesn't need to be exported to outside intc code. I will fix it up locally ! > + > /* > ******************************************************************* > * Generic structures to hold build configuration used at runtime > diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c > index ecef0fb..9de0665 100644 > --- a/arch/arc/kernel/intc-arcv2.c > +++ b/arch/arc/kernel/intc-arcv2.c > @@ -24,13 +24,7 @@ void arc_init_IRQ(void) > { > unsigned int tmp, irq_prio; > > - struct irq_build { > -#ifdef CONFIG_CPU_BIG_ENDIAN > - unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8; > -#else > - unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3; > -#endif > - } irq_bcr; > + struct bcr_irq_arcv2 irq_bcr; > > struct aux_irq_ctrl { > #ifdef CONFIG_CPU_BIG_ENDIAN > @@ -69,7 +63,7 @@ void arc_init_IRQ(void) > irq_bcr.firq ? " FIRQ (not used)":""); > > /* setup status32, don't enable intr yet as kernel doesn't want */ > - tmp = read_aux_reg(0xa); > + tmp = read_aux_reg(ARC_REG_STATUS32); > tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1); > tmp &= ~STATUS_IE_MASK; > asm volatile("kflag %0 \n"::"r"(tmp)); >