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From: Raphael Gault <Raphael.Gault@arm.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"mingo@redhat.com" <mingo@redhat.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Will Deacon <Will.Deacon@arm.com>,
	"acme@kernel.org" <acme@kernel.org>,
	Mark Rutland <Mark.Rutland@arm.com>
Subject: Re: [PATCH 4/6] arm64: pmu: Add hook to handle pmu-related undefined instructions
Date: Fri, 17 May 2019 07:35:16 +0000	[thread overview]
Message-ID: <c7c4c851-51d9-a596-cba2-23252785251c@arm.com> (raw)
In-Reply-To: <20190517071018.GH2623@hirez.programming.kicks-ass.net>

Hi,

On 5/17/19 8:10 AM, Peter Zijlstra wrote:
> On Thu, May 16, 2019 at 02:21:46PM +0100, Raphael Gault wrote:
>> In order to prevent the userspace processes which are trying to access
>> the registers from the pmu registers on a big.LITTLE environment we
>> introduce a hook to handle undefined instructions.
>>
>> The goal here is to prevent the process to be interrupted by a signal
>> when the error is caused by the task being scheduled while accessing
>> a counter, causing the counter access to be invalid. As we are not able
>> to know efficiently the number of counters available physically on both
>> pmu in that context we consider that any faulting access to a counter
>> which is architecturally correct should not cause a SIGILL signal if
>> the permissions are set accordingly.
>
> The other approach is using rseq for this; with that you can guarantee
> it will never issue the instruction on a wrong CPU.
>
> That said; emulating the thing isn't horrible either.
>
>> +/*
>> + * We put 0 in the target register if we
>> + * are reading from pmu register. If we are
>> + * writing, we do nothing.
>> + */
>
> Wait _what_ ?!? userspace can _WRITE_ to these registers?
>

The user can write to some pmu registers but those are not the ones that
interest us here. My comment was ill formed, indeed this hook can only
be triggered by reads in this case.
Sorry about that.

Thanks,

--
Raphael Gault
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  reply	other threads:[~2019-05-17  7:35 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-16 13:21 [RFC 0/6] arm64: Enable access to pmu registers by user-space Raphael Gault
2019-05-16 13:21 ` [PATCH 1/6] perf: arm64: Compile tests unconditionally Raphael Gault
2019-05-16 13:21 ` [PATCH 2/6] perf: arm64: Add test to check userspace access to hardware counters Raphael Gault
2019-05-16 13:21 ` [PATCH 3/6] arm64: pmu: Add function implementation to update event index in userpage Raphael Gault
2019-05-17 13:21   ` Mark Rutland
2019-05-16 13:21 ` [PATCH 4/6] arm64: pmu: Add hook to handle pmu-related undefined instructions Raphael Gault
2019-05-17  7:10   ` Peter Zijlstra
2019-05-17  7:35     ` Raphael Gault [this message]
2019-05-17  8:04     ` Mark Rutland
2019-05-17  8:26       ` Peter Zijlstra
2019-05-17  9:07         ` Peter Zijlstra
2019-05-16 13:21 ` [PATCH 5/6] arm64: perf: Enable pmu counter direct access for perf event on armv8 Raphael Gault
2019-05-16 13:21 ` [PATCH 6/6] Documentation: arm64: Document PMU counters access from userspace Raphael Gault

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