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([2a09:80c0:192:0:36d3:2b96:a142:a05b]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ee0a477d9sm3898910f8f.26.2024.10.21.02.51.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Oct 2024 02:51:40 -0700 (PDT) Message-ID: Date: Mon, 21 Oct 2024 11:51:38 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/3] mm/memblock,x86,acpi: hotplug memory alignment advisement To: Gregory Price , x86@kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-mm@kvack.org Cc: dan.j.williams@intel.com, ira.weiny@intel.com, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, rafael@kernel.org, lenb@kernel.org, rppt@kernel.org, akpm@linux-foundation.org, alison.schofield@intel.com, Jonathan.Cameron@huawei.com, rrichter@amd.com, ytcoode@gmail.com, haibo1.xu@intel.com, dave.jiang@intel.com References: <20241016192445.3118-1-gourry@gourry.net> From: David Hildenbrand Content-Language: en-US In-Reply-To: <20241016192445.3118-1-gourry@gourry.net> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Am 16.10.24 um 21:24 schrieb Gregory Price: > When physical address regions are not aligned to memory block size, > the misaligned portion is lost (stranded capacity). > > Block size (min/max/selected) is architecture defined. Most architectures > tend to use the minimum block size or some simplistic heurist. On x86, > memory block size increases up to 2GB, and is otherwise fitted to the > alignment of non-hotplug (special purpose memory). > > CXL exposes its memory for management through the ACPI CEDT (CXL Early > Detection Table) in a field called the CXL Fixed Memory Window. Per > the CXL specification, this memory must be aligned to at least 256MB. > > When a CFMW aligns on a size less than the block size, this causes a > loss of up to 2GB per CFMW on x86. It is not uncommon for CFMW to be > allocated per-device - though this behavior is BIOS defined. > > This patch set provides 3 things: > 1) implement advise/probe functions in mm/memblock.c to report/probe > architecture agnostic hotplug memory alignment advice. > 2) update x86 memblock size logic to consider the hotplug advice > 3) add code in acpi/numa/srat.c to report CFMW alignment advice > > The advisement interfaces are design to be called during arch_init > code prior to allocator and smp_init. start_kernel will call these > through setup_arch() (via acpi and mm/init_64.c on x86), which occurs > prior to mm_core_init and smp_init - so no need for atomics. > > There's an attempt to signal callers to advise() that probe has already > occurred, but this is predicated on the notion that probe() actually > occurs (which presently only happens on x86). This is to assist debugging > future users who may mistakenly call this after allocator or smp init. > > Likewise, if probe() occurs more than once, we return -EBUSY to prevent > inconsistent values from being reported - i.e. this interaction should > happen exactly once, and all other behavior is an error / the probed > value should be acquired via memory_block_size_bytes() instead. > > Suggested-by: Ira Weiny > Suggested-by: David Hildenbrand > Suggested-by: Dan Williams > Signed-off-by: Gregory Price Just as a side note, a while ago there was a discussion about variable-sized memory blocks -- essentially removing memory_block_size_bytes(). The main issue is that this would change /sys/devices/system/memory/ in ways it could break existing user space. I believe there are other corner cases that are a bit nasty to handle (e.g., removing parts of a larger memory block), but likely it could be handled. -- Cheers, David / dhildenb