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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5cbb63197d5sm833015a12.72.2024.10.25.10.46.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 25 Oct 2024 10:46:09 -0700 (PDT) Message-ID: Date: Fri, 25 Oct 2024 19:46:08 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: qcs615: Add LLCC support for QCS615 To: Song Xue , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: kernel@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241011-add_llcc_dts_node_for_qcs615-v1-1-e7aa45244c36@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241011-add_llcc_dts_node_for_qcs615-v1-1-e7aa45244c36@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: vhRaLBRk0JOpM9JeVUlhDkH7jxu8-qBr X-Proofpoint-ORIG-GUID: vhRaLBRk0JOpM9JeVUlhDkH7jxu8-qBr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 bulkscore=0 spamscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410250136 On 11.10.2024 12:41 PM, Song Xue wrote: > The QCS615 platform has LLCC(Last Level Cache Controller) as the system > cache controller. It includes 1 LLCC instance and 1 LLCC broadcast > interface. > > Add LLCC node support for the QCS615 platform. > > Signed-off-by: Song Xue > --- > This patch series depends on below patch series: > https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@quicinc.com/ > https://lore.kernel.org/linux-arm-msm/20241010-add_llcc_support_for_qcs615-v2-1-044432450a75@quicinc.com/ > --- > arch/arm64/boot/dts/qcom/qcs615.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > index ac4c4c751da1fbb28865877555ba317677bc6bd2..b718a4d2270d64ed43c2eca078bfe52b78ff680c 100644 > --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > @@ -495,6 +495,14 @@ dc_noc: interconnect@9160000 { > qcom,bcm-voters = <&apps_bcm_voter>; > }; > > + llcc: system-cache-controller@9200000 { > + compatible = "qcom,qcs615-llcc"; > + reg = <0x0 0x9200000 0x0 0x50000>, > + <0x0 0x9600000 0x0 0x50000>; Please pad both addresses to 8 hex digits (e.g. 0x09200000) With that: Reviewed-by: Konrad Dybcio Konrad