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This is similar to > the TX side except that we explicitly mask the source interrupt in the > primary handler and unmask it in the threaded handler again after > success. This was done automatically in the TX part. > > The masking/ unmasking can be removed from imx_mu_specific_rx() since it > already happens in the primary/ threaded handler before invoking the > channel specific callback. > > Move RX channel handling into threaded handler. Hi Sebastian, It is not very clear from me from the commit message why this change is needed. Can you please update the commit message with proper explanation? > > Signed-off-by: Sebastian Andrzej Siewior > --- > drivers/mailbox/imx-mailbox.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c > index 006aa76b74b62..6fe202593592f 100644 > --- a/drivers/mailbox/imx-mailbox.c > +++ b/drivers/mailbox/imx-mailbox.c > @@ -381,7 +381,6 @@ static int imx_mu_specific_rx(struct imx_mu_priv *priv, struct imx_mu_con_priv * > > data = (u32 *)priv->msg; > > - imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); > *data++ = imx_mu_read(priv, priv->dcfg->xRR); > > if (priv->dcfg->type & IMX_MU_V2_S4) { > @@ -408,7 +407,6 @@ static int imx_mu_specific_rx(struct imx_mu_priv *priv, struct imx_mu_con_priv * > *data++ = imx_mu_read(priv, priv->dcfg->xRR + (i % num_rr) * 4); > } > > - imx_mu_xcr_set_act(priv, cp, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); > mbox_chan_received_data(cp->chan, (void *)priv->msg); > > return 0; > @@ -555,6 +553,12 @@ static irqreturn_t imx_mu_isr_th(int irq, void *p) > mbox_chan_txdone(chan, 0); > break; > > + case IMX_MU_TYPE_RX: > + cp->pending = false; > + if (!priv->dcfg->rx(priv, cp)) > + imx_mu_xcr_set_act(priv, cp, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); > + break; > + > default: > dev_warn_ratelimited(priv->dev, "Unhandled channel type %d\n", > cp->type); > @@ -608,7 +612,9 @@ static irqreturn_t imx_mu_isr(int irq, void *p) > ret = IRQ_WAKE_THREAD; > } else if ((val == IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx)) && > (cp->type == IMX_MU_TYPE_RX)) { > - priv->dcfg->rx(priv, cp); > + cp->pending = true; > + imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); > + ret = IRQ_WAKE_THREAD; > } else if ((val == IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx)) && > (cp->type == IMX_MU_TYPE_RXDB)) { > priv->dcfg->rxdb(priv, cp); >