From: <Dan.Sneddon@microchip.com>
To: <broonie@kernel.org>, <Dan.Sneddon@microchip.com>
Cc: <linux-spi@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <Tudor.Ambarus@microchip.com>,
<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<Ludovic.Desroches@microchip.com>
Subject: Re: [PATCH] spi: atmel: Fix CS and initialization bug
Date: Tue, 29 Jun 2021 17:01:57 +0000 [thread overview]
Message-ID: <c849eb7a-d019-b88e-583a-78e1eba7624c@microchip.com> (raw)
In-Reply-To: <20210629164733.GE4613@sirena.org.uk>
On 6/29/21 9:47 AM, Mark Brown wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Tue, Jun 29, 2021 at 09:29:14AM -0700, Dan Sneddon wrote:
>
>> spi_setup won't get programmed into the hardware. This patch makes
>> sure the cs_activate call is made even with a gpio controlled chip
>> select.
>
>In what way does it do that? I can't tell what the patch is supposed >to
>do.
The SPI_MASTER_GPIO_SS flag has to be set so that the set_cs function
gets called even when using gpio cs pins.
>
>> - enable =3D (!!(spi->mode & SPI_CS_HIGH) =3D=3D enable);
>> =20
>> - if (enable) {
>> + if ((enable && (spi->mode & SPI_CS_HIGH))
>> + || (!enable && !(spi->mode & SPI_CS_HIGH))) {
>
>This looks especially suspicious.
It's due to the fact that the spi core tells set_cs if the cs should be
high or low, not active or disabled. This logic is to convert from
high/low to active/disabled.
next prev parent reply other threads:[~2021-06-29 17:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-29 16:29 Dan Sneddon
2021-06-29 16:47 ` Mark Brown
2021-06-29 17:01 ` Dan.Sneddon [this message]
2021-06-29 17:07 ` Mark Brown
2021-06-29 17:50 ` Dan.Sneddon
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