From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753694AbdKMQWL (ORCPT ); Mon, 13 Nov 2017 11:22:11 -0500 Received: from mx1.redhat.com ([209.132.183.28]:51226 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753635AbdKMQWJ (ORCPT ); Mon, 13 Nov 2017 11:22:09 -0500 Subject: Re: [patch v2 7/8] KVM: x86: add Intel PT msr RTIT_CTL read/write To: Luwei Kang , kvm@vger.kernel.org Cc: rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org, Chao Peng References: <1509401117-15521-1-git-send-email-luwei.kang@intel.com> <1509401117-15521-8-git-send-email-luwei.kang@intel.com> From: Paolo Bonzini Message-ID: Date: Mon, 13 Nov 2017 17:22:03 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <1509401117-15521-8-git-send-email-luwei.kang@intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 13 Nov 2017 16:22:09 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30/10/2017 23:05, Luwei Kang wrote: > From: Chao Peng > > L1 hypervisor can't get the capability of "TraceEn can be > set in VMX operation"(IA32_VMX_MISC[14]=0) and any attempt > to set IA32_RTIT_CTL.TraceEn in VMX operation using WRMSR > will cause a general-protection exception if IA32_VMX_MISC[14] > is 0. So we need to leave out write this msr in L1 VMX > operation. > > Signed-off-by: Chao Peng > Signed-off-by: Luwei Kang > --- > arch/x86/kvm/vmx.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 091120e..8f61a8d 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -936,6 +936,7 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu, > static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked); > static bool nested_vmx_is_page_fault_vmexit(struct vmcs12 *vmcs12, > u16 error_code); > +static bool vmx_pt_supported(void); > > static DEFINE_PER_CPU(struct vmcs *, vmxarea); > static DEFINE_PER_CPU(struct vmcs *, current_vmcs); > @@ -3384,6 +3385,11 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > return 1; > msr_info->data = vcpu->arch.ia32_xss; > break; > + case MSR_IA32_RTIT_CTL: > + if (!vmx_pt_supported()) > + return 1; > + msr_info->data = vmcs_read64(GUEST_IA32_RTIT_CTL); > + break; > case MSR_TSC_AUX: > if (!msr_info->host_initiated && > !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) > @@ -3508,6 +3514,11 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > else > clear_atomic_switch_msr(vmx, MSR_IA32_XSS); > break; > + case MSR_IA32_RTIT_CTL: > + if (!vmx_pt_supported() || to_vmx(vcpu)->nested.vmxon) > + return 1; VMXON must also clear TraceEn bit (see 23.4 in the SDM). You also need to support R/W of all the other MSRs, in order to make them accessible to userspace, and add them in msrs_to_save and kvm_init_msr_list. Regarding the save/restore of the state, I am now wondering if you could also use XSAVES and XRSTORS instead of multiple rdmsr/wrmsr in a loop. The cost is two MSR writes on vmenter (because the guest must run with IA32_XSS=0) and two on vmexit. Thanks, Paolo > + vmcs_write64(GUEST_IA32_RTIT_CTL, data); > + break; > case MSR_TSC_AUX: > if (!msr_info->host_initiated && > !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) >