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[24.9.64.241]) by smtp.gmail.com with ESMTPSA id z18sm14301oib.27.2021.09.08.13.00.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Sep 2021 13:00:06 -0700 (PDT) Subject: Re: [PATCH 01/19] x86/cpufreatures: add AMD CPPC extension feature flag To: Huang Rui , "Rafael J . Wysocki" , Viresh Kumar , Borislav Petkov , Ingo Molnar , linux-pm@vger.kernel.org Cc: Deepak Sharma , Alex Deucher , Mario Limonciello , Nathan Fontenot , Jinzhou Su , Xiaojian Du , linux-kernel@vger.kernel.org, x86@kernel.org, Shuah Khan References: <20210908150001.3702552-1-ray.huang@amd.com> <20210908150001.3702552-2-ray.huang@amd.com> From: Shuah Khan Message-ID: Date: Wed, 8 Sep 2021 14:00:04 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210908150001.3702552-2-ray.huang@amd.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/8/21 8:59 AM, Huang Rui wrote: > Add Collaborative Processor Performance Control Extension feature flag > for AMD processors. > Please add a couple of sentences about the feature and what it does. > Signed-off-by: Huang Rui > --- > arch/x86/include/asm/cpufeatures.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index d0ce5cfd3ac1..f7aea50e3371 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -313,6 +313,7 @@ > #define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */ > #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */ > #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ > +#define X86_FEATURE_AMD_CPPC_EXT (13*32+27) /* Collaborative Processor Performance Control Extension */ > > /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ > #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */ > thanks, -- Shuah