From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ixit.cz (ixit.cz [185.100.197.86]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8140312825; Mon, 1 Jun 2026 12:48:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.100.197.86 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780318120; cv=none; b=qU2RPqdM0sTUqKEvogcrAppv40+GyuXYTFqzR2OQ09s/K/tnA+KLEp3p4AVGzSNwunyebPWL7AaSHht0JdZ33eNfCU1XO+AXX8nNUwTw7btHsQ6vUKXS5uX4SVk6K2F4WQ+P3brSzBnr3ULt8hEmyXatp7IjbSfVHpeHfNkoDgA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780318120; c=relaxed/simple; bh=crxdKZoTI+jDwFs0/5V0KIo2XWywz5U4PLR/JdfStOs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=D2GzQLfaU5RmIcsCGyz2fhbbIL+Cdjf9QDe+pgopsDUmDBPcnLCayHgdUnh1CPDhUghVVLxnitqDjQkn78vdlrRRiA+rOWCFHJk7/MT6XxedMQw3iav36UvuhSbPvj/CyDH0vBLA9mUNqjMWJJlrxHyP6aLwblYzCaXl1vbuwj4= ARC-Authentication-Results:i=1; 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bh=npppapGLI5N30vwTwhBrK+A7/r+ID4Cbad3ZNd7CvvY=; b=OkNnLcHSZDvkrwV1Yz/LrUV6IospgJiFKvrNUVlv4YqqDMkBXkCgAjVKE6M0EKyDerkg6l lFRLz+8lawvljOpiSBdya1lJAB1u2JG3PEr2gIaH7uyIoTjTauGRirazM4qBajKmMP2guS 5caq452A1D8edlXEhWe+i5aPDoH5j8o= Message-ID: Date: Mon, 1 Jun 2026 14:48:22 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH WIP v5 2/9] media: qcom: camss: csiphy-3ph: Use odd bits for configuring C-PHY lanes To: Sakari Ailus Cc: Robert Foss , Todor Tomov , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , Casey Connolly , "Dr. Git" , Cory Keitz , Loic Poulain , Konrad Dybcio , Joel Selvaraj , Kieran Bingham , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org References: <20260531-qcom-cphy-v5-0-6be0f62b4d65@ixit.cz> <20260531-qcom-cphy-v5-2-6be0f62b4d65@ixit.cz> Content-Language: en-US From: David Heidelberg Autocrypt: addr=david@ixit.cz; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 01/06/2026 10:49, Sakari Ailus wrote: > Hi David, > > Thanks for the patch. > > On Sun, May 31, 2026 at 03:08:10PM +0200, David Heidelberg via B4 Relay wrote: >> From: David Heidelberg >> >> So far, only D-PHY mode was supported, which uses even bits when enabling >> or masking lanes. For C-PHY configuration, the hardware instead requires >> using the odd bits. >> >> Since there can be unrecognized configuration allow returning failure. >> >> Reviewed-by: Bryan O'Donoghue >> Acked-by: Cory Keitz >> Signed-off-by: David Heidelberg >> --- >> .../platform/qcom/camss/camss-csiphy-2ph-1-0.c | 8 ++-- >> .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 49 +++++++++++++++++----- >> drivers/media/platform/qcom/camss/camss-csiphy.c | 5 +-- >> drivers/media/platform/qcom/camss/camss-csiphy.h | 6 +-- >> 4 files changed, 48 insertions(+), 20 deletions(-) >> [...] >> -static void csiphy_lanes_enable(struct csiphy_device *csiphy, >> - struct csiphy_config *cfg, >> - s64 link_freq, u8 lane_mask) >> +static int csiphy_lanes_enable(struct csiphy_device *csiphy, >> + struct csiphy_config *cfg, >> + s64 link_freq, u8 lane_mask) >> { >> + struct device *dev = csiphy->camss->dev; >> struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; >> struct csiphy_device_regs *regs = csiphy->regs; >> u8 settle_cnt; >> u8 val; >> int i; >> >> settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); >> >> - val = CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; >> - for (i = 0; i < c->num_data; i++) >> - val |= BIT(c->data[i].pos * 2); >> + val = 0; >> + >> + switch (c->phy_cfg) { >> + case V4L2_MBUS_CSI2_CPHY: >> + for (i = 0; i < c->num_data; i++) >> + val |= BIT((c->data[i].pos * 2) + 1); >> + break; >> + case V4L2_MBUS_CSI2_DPHY: >> + val = CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; >> + >> + for (i = 0; i < c->num_data; i++) >> + val |= BIT(c->data[i].pos * 2); >> + break; >> + default: >> + dev_err(dev, "Unsupported bus type %d\n", c->phy_cfg); >> + return -EINVAL; > > If this is the only reason why you're changing the return type to int, I'd > suggest using WARN_ON() in this case. I presume it'd take a driver bug for > this to trigger? Thank you for the review. If others agree, I would also prefer WARN_ON instead of changing return values. David [...]