From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Maulik Shah <maulik.shah@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Linus Walleij <linusw@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-gpio@vger.kernel.org,
Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Subject: Re: [PATCH v3 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode
Date: Thu, 18 Jun 2026 10:19:20 +0200 [thread overview]
Message-ID: <c90884fd-a354-45f3-bbfa-77c58d8d3b1b@oss.qualcomm.com> (raw)
In-Reply-To: <20260616-hamoa_pdc_v3-v3-5-4d8e1504ea75@oss.qualcomm.com>
On 6/16/26 11:25 AM, Maulik Shah wrote:
> All PDC irqchip supports pass through mode in which both Direct SPIs and
> GPIO IRQs (as SPIs) are sent to GIC without latching at PDC.
>
> Newer PDCs (v3.0 onwards) also support additional secondary controller mode
> where PDC latches GPIO IRQs and sends to GIC as level type IRQ. Direct SPIs
> still works same as pass through mode without latching at PDC even in
> secondary controller mode.
>
> All the SoCs so far default uses pass through mode with the exception of
> x1e. x1e PDC may be set to secondary controller mode for builds on CRD
> boards whereas it may be set to pass through mode for IoT-EVK boards.
> The mode configuration is done in firmware and initially shipped windows
> firmware did not have SCM interface to read or modify the PDC mode.
> Later only write access is opened up for non secure world.
>
> Using the write access available add changes to modify the PDC mode to
> pass through mode via SCM write. When the write fails (on older firmware)
> assume to work in secondary mode.
>
> In secondary mode set the separate irqchip for the GPIOs to perform
> additional operations only for the GPIO irqs.
>
> Co-developed-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> ---
[...]
> +static void pdc_clear_gpio_cfg(int pin_out)
> +{
> + unsigned long gpio_sts;
> +
> + if (pdc->version < PDC_VERSION_3_0)
> + return;
> +
> + gpio_sts = pdc_reg_read(pdc->regs->irq_cfg_reg, pin_out);
> + __clear_bit(pdc->cfg_fields->gpio_irq_sts, &gpio_sts);
> + pdc_reg_write(pdc->regs->irq_cfg_reg, pin_out, gpio_sts);
> +}
> +
> +static void pdc_unmask_gpio_cfg(int pin_out, bool unmask)
> +{
> + unsigned long gpio_mask;
> +
> + if (pdc->version < PDC_VERSION_3_0)
> + return;
These version checks should be unnecessary now, given the function pointer
is only assigned for hamoa
Konrad
next prev parent reply other threads:[~2026-06-18 8:19 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-16 9:25 [PATCH v3 0/8] x1e80100: Enable PDC wake GPIOs and deepest idle state Maulik Shah
2026-06-16 9:25 ` [PATCH v3 1/8] irqchip/qcom-pdc: restructure version support Maulik Shah
2026-06-17 13:12 ` Konrad Dybcio
2026-06-25 9:19 ` Maulik Shah (mkshah)
2026-06-30 14:38 ` Thomas Gleixner
2026-07-03 8:18 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 2/8] irqchip/qcom-pdc: Move all statics to struct pdc_desc Maulik Shah
2026-06-17 13:26 ` Konrad Dybcio
2026-06-25 9:19 ` Maulik Shah (mkshah)
2026-06-29 9:56 ` Konrad Dybcio
2026-06-30 14:46 ` Thomas Gleixner
2026-07-03 8:46 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 3/8] irqchip/qcom-pdc: Remove pdc_enable_intr() wrapper Maulik Shah
2026-06-28 17:54 ` Val Packett
2026-06-30 3:52 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 4/8] irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI Maulik Shah
2026-06-18 8:02 ` Konrad Dybcio
2026-06-25 9:20 ` Maulik Shah (mkshah)
2026-06-30 14:57 ` Thomas Gleixner
2026-07-03 8:17 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode Maulik Shah
2026-06-18 8:18 ` Konrad Dybcio
2026-06-25 9:24 ` Maulik Shah (mkshah)
2026-06-18 8:19 ` Konrad Dybcio [this message]
2026-06-25 9:25 ` Maulik Shah (mkshah)
2026-06-30 15:07 ` Thomas Gleixner
2026-06-30 15:09 ` Thomas Gleixner
2026-07-03 9:20 ` Maulik Shah (mkshah)
2026-06-16 9:25 ` [PATCH v3 6/8] pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller Maulik Shah
2026-06-16 9:25 ` [PATCH v3 7/8] Revert "pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now" Maulik Shah
2026-06-16 9:25 ` [PATCH v3 8/8] arm64: dts: qcom: x1e80100: Add deepest idle state Maulik Shah
2026-06-18 8:25 ` Konrad Dybcio
2026-07-07 6:45 ` Maulik Shah (mkshah)
2026-06-28 18:39 ` [PATCH v3 0/8] x1e80100: Enable PDC wake GPIOs and " Val Packett
2026-06-29 9:54 ` Konrad Dybcio
2026-07-03 9:30 ` Maulik Shah (mkshah)
2026-06-30 11:42 ` Linus Walleij
2026-06-30 14:34 ` Thomas Gleixner
2026-07-01 7:35 ` Bartosz Golaszewski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c90884fd-a354-45f3-bbfa-77c58d8d3b1b@oss.qualcomm.com \
--to=konrad.dybcio@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=maulik.shah@oss.qualcomm.com \
--cc=robh@kernel.org \
--cc=sneh.mankad@oss.qualcomm.com \
--cc=tglx@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®