From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934127AbdKGNLn (ORCPT ); Tue, 7 Nov 2017 08:11:43 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:27507 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932671AbdKGNLl (ORCPT ); Tue, 7 Nov 2017 08:11:41 -0500 Subject: Re: [PATCH v3 0/9] irqchip: stm32: add stm32h7 support To: Ludovic BARRE , Marc Zyngier , Thomas Gleixner , Jason Cooper , Rob Herring CC: Maxime Coquelin , , , References: <1509987819-29599-1-git-send-email-ludovic.Barre@st.com> <04d9d728-7f9f-6bc0-bb57-c7bb49817872@arm.com> <2f41fc16-6ed2-2d44-52e9-5461c86baf75@st.com> From: Alexandre Torgue Message-ID: Date: Tue, 7 Nov 2017 14:11:01 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <2f41fc16-6ed2-2d44-52e9-5461c86baf75@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG5NODE3.st.com (10.75.127.15) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-11-07_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi On 11/07/2017 02:06 PM, Ludovic BARRE wrote: > hi Marc > > normally, Alex take the last 3 ("ARM: dts") > commits in his branch, and will send in his pull request > Alex you confirm? Yes. I will merge DT patches in my next pull request (for 4. 16) Regards Alex > > BR > Ludo > > On 11/07/2017 12:23 PM, Marc Zyngier wrote: >> Hi Ludovic, >> >> On 06/11/17 17:03, Ludovic Barre wrote: >>> From: Ludovic Barre >>> >>> This series adds: >>> -Management of multi-bank of external interrupts >>> stm32h7 has up to 96 inputs (3 banks of  32 inputs). >>> -Fix initial value after cold/hot boot (wakeup issue). >>> >>> Changes v3: >>> -remove chip.name and handler, already done by >>> irq_alloc_domain_generic_chips >>> -add Rob ack in dt-bindings commit >>> >>> Changes v2: >>> -Remove irq_mask and adds const on struct stm32_exti_bank >>> -Add wrapper functions pending and ack >>> -Replace BITS_PER_LONG by IRQS_PER_BANK >>> -Fill commit message on >>> "ARM: dts: stm32: add support of exti on stm32h743" >>> -Add system config bank for stm32h7 >>> >>> Ludovic Barre (9): >>>    irqchip: stm32: select GENERIC_IRQ_CHIP >>>    irqchip: stm32: add multi-bank management >>>    dt-bindings: interrupt-controllers: add compatible string for stm32h7 >>>    irqchip: stm32: add stm32h7 support >>>    irqchip: stm32: fix initial values >>>    irqchip: stm32: move the wakeup on interrupt mask >>>    ARM: dts: stm32: add exti support for stm32h743 >>>    ARM: dts: stm32: add system config bank node for stm32h743 >>>    ARM: dts: stm32: add support of exti on stm32h743 pinctrl >>> >>>   .../interrupt-controller/st,stm32-exti.txt         |   4 +- >>>   arch/arm/boot/dts/stm32h743-pinctrl.dtsi           |  24 +++ >>>   arch/arm/boot/dts/stm32h743.dtsi                   |  13 ++ >>>   drivers/irqchip/Kconfig                            |   1 + >>>   drivers/irqchip/irq-stm32-exti.c                   | 206 >>> ++++++++++++++++----- >>>   5 files changed, 198 insertions(+), 50 deletions(-) >>> >> >> I'm happy to take the first 6 patches through the irqchip tree. How >> about the last 3? I'd rather see them routed via armsoc if there is any >> risk of merge conflicts. >> >> How do you want to proceed? >> >> Thanks, >> >>     M. >>