From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AF45C4724C for ; Thu, 7 May 2020 11:47:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 593E220735 for ; Thu, 7 May 2020 11:47:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="u4kKeVAR" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726638AbgEGLrU (ORCPT ); Thu, 7 May 2020 07:47:20 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:55908 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725903AbgEGLrT (ORCPT ); Thu, 7 May 2020 07:47:19 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 047BlDVV124185; Thu, 7 May 2020 06:47:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1588852033; bh=BMGzqer+DWUoEKSS+dBUfKNGGh9G1GOzHgNg215nJaM=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=u4kKeVAR6GOsWI6xKQQXLoC6q+A/7jMk1B2BX3f0AQUA6efHQdusFcqCdvsTtLmwb lZEc7BEeMS86EnKS3yGUL4gX+4RfB72iuNsKTyPT8PHb0RSM9V1Pzda86c1FlAro+L qYedcV8NKFNrSSjmPXWOZGZzQ7JyxjuJ1RPeJl5Y= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 047BlDat068218 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 7 May 2020 06:47:13 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 7 May 2020 06:47:13 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 7 May 2020 06:47:13 -0500 Received: from [127.0.0.1] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 047Bl9mu023398; Thu, 7 May 2020 06:47:10 -0500 Subject: Re: [PATCH v2 0/2] soc: ti: add k3 platforms chipid module driver To: Grygorii Strashko , Santosh Shilimkar , Rob Herring , Lokesh Vutla , CC: Dave Gerlach , Sekhar Nori , , , Nishanth Menon References: <20200505193417.2112-1-grygorii.strashko@ti.com> From: Tero Kristo Message-ID: Date: Thu, 7 May 2020 14:47:09 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200505193417.2112-1-grygorii.strashko@ti.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/05/2020 22:34, Grygorii Strashko wrote: > Hi All, > > This series introduces TI K3 Multicore SoC platforms chipid module driver > which provides identification support of the TI K3 SoCs (family, revision) > and register this information with the SoC bus. It is available under > /sys/devices/soc0/ for user space, and can be checked, where needed, > in Kernel using soc_device_match(). > It is also required for introducing support for new revisions of > K3 AM65x/J721E SoCs. > > Example J721E: > # cat /sys/devices/soc0/{machine,family,revision} > Texas Instruments K3 J721E SoC > J721E > SR1.0 > > Example AM65x: > # cat /sys/devices/soc0/{machine,family,revision} > Texas Instruments AM654 Base Board > AM65X > SR1.0 > > Changes in v2: > - pr_debug() replaced with pr_info() to show SoC info on init > - minor format change > - split series on driver and platform changes > - add Reviewed-by: Lokesh Vutla > > v1: https://lwn.net/Articles/818577/ > > Grygorii Strashko (2): > dt-bindings: soc: ti: add binding for k3 platforms chipid module > soc: ti: add k3 platforms chipid module driver > > .../bindings/soc/ti/k3-socinfo.yaml | 40 ++++++ > drivers/soc/ti/Kconfig | 10 ++ > drivers/soc/ti/Makefile | 1 + > drivers/soc/ti/k3-socinfo.c | 135 ++++++++++++++++++ > 4 files changed, 186 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml > create mode 100644 drivers/soc/ti/k3-socinfo.c > Got a minor comments on patch #2, other than that looks fine to me. Once that is fixed, for whole series: Reviewed-by: Tero Kristo -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki