From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B1FBC433DF for ; Fri, 3 Jul 2020 16:59:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1911B208C7 for ; Fri, 3 Jul 2020 16:59:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="fDmiVC3/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726675AbgGCQ7U (ORCPT ); Fri, 3 Jul 2020 12:59:20 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:22184 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726148AbgGCQ7U (ORCPT ); Fri, 3 Jul 2020 12:59:20 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1593795559; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=+gnWJZLQFOi3Y3xgbq+Jj83g8jf7HMQgZHy7FN5ldrA=; b=fDmiVC3/UUDh81x2fPLdbadyxJH4jm5fhdKF2HrnItzWXJY8XBT/Ox7Y7x+ggbt4KMtzRE6P pHfnmM8MegU/7n+BxWqEJBhkf2K8SfULnDHzyQ4zgSLw/DK+ABSYaCPL35oT1uQehqPrZqSH S0c/d1A8odRb5I4O+O31CZbeTVA= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-east-1.postgun.com with SMTP id 5eff63e7356bcc26abeb13a4 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 03 Jul 2020 16:59:19 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 93A4CC433B1; Fri, 3 Jul 2020 16:59:17 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6CB36C433C6; Fri, 3 Jul 2020 16:59:16 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 03 Jul 2020 22:29:16 +0530 From: Sai Prakash Ranjan To: Rob Clark Cc: Sean Paul , freedreno , David Airlie , Will Deacon , Joerg Roedel , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , dri-devel , Linux Kernel Mailing List , Jordan Crouse , Matthias Kaehlcke , Akhil P Oommen , Daniel Vetter , linux-arm-msm , "Kristian H . Kristensen" , Stephen Boyd , Robin Murphy , Sharat Masetty , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Emil Velikov Subject: Re: [PATCHv3 7/7] drm/msm/a6xx: Add support for using system cache(LLC) In-Reply-To: References: <449a6544b10f0035d191ac52283198343187c153.1593344120.git.saiprakash.ranjan@codeaurora.org> <20200703133732.GD18953@willie-the-truck> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-07-03 21:34, Rob Clark wrote: > On Fri, Jul 3, 2020 at 7:53 AM Sai Prakash Ranjan > wrote: >> >> Hi Will, >> >> On 2020-07-03 19:07, Will Deacon wrote: >> > On Mon, Jun 29, 2020 at 09:22:50PM +0530, Sai Prakash Ranjan wrote: >> >> diff --git a/drivers/gpu/drm/msm/msm_iommu.c >> >> b/drivers/gpu/drm/msm/msm_iommu.c >> >> index f455c597f76d..bd1d58229cc2 100644 >> >> --- a/drivers/gpu/drm/msm/msm_iommu.c >> >> +++ b/drivers/gpu/drm/msm/msm_iommu.c >> >> @@ -218,6 +218,9 @@ static int msm_iommu_map(struct msm_mmu *mmu, >> >> uint64_t iova, >> >> iova |= GENMASK_ULL(63, 49); >> >> >> >> >> >> + if (mmu->features & MMU_FEATURE_USE_SYSTEM_CACHE) >> >> + prot |= IOMMU_SYS_CACHE_ONLY; >> > >> > Given that I think this is the only user of IOMMU_SYS_CACHE_ONLY, then >> > it >> > looks like it should actually be a property on the domain because we >> > never >> > need to configure it on a per-mapping basis within a domain, and >> > therefore >> > it shouldn't be exposed by the IOMMU API as a prot flag. >> > >> > Do you agree? >> > >> >> GPU being the only user is for now, but there are other clients which >> can use this. >> Plus how do we set the memory attributes if we do not expose this as >> prot flag? > > It does appear that the downstream kgsl driver sets this for basically > all mappings.. well there is some conditional stuff around > DOMAIN_ATTR_USE_LLC_NWA but it seems based on the property of the > domain. (Jordan may know more about what that is about.) But looks > like there are a lot of different paths into iommu_map in kgsl so I > might have missed something. > > Assuming there isn't some case where we specifically don't want to use > the system cache for some mapping, I think it could be a domain > attribute that sets an io_pgtable_cfg::quirks flag > Ok then we are good to remove unused sys cache prot flag which Will has posted. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation