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[78.210.255.2]) by smtp.googlemail.com with ESMTPSA id g67sm14717299wmd.38.2018.12.03.04.59.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Dec 2018 04:59:10 -0800 (PST) Subject: Re: [PATCH] clocksource: riscv_timer: Provide sched_clock To: Anup Patel , Thomas Gleixner , Palmer Dabbelt , Albert Ou Cc: Atish Patra , Christoph Hellwig , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20181203123524.11778-1-anup@brainfault.org> From: Daniel Lezcano Message-ID: Date: Mon, 3 Dec 2018 13:59:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20181203123524.11778-1-anup@brainfault.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/12/2018 13:35, Anup Patel wrote: > Currently, we don't have a sched_clock registered for RISC-V systems. > This means Linux time keeping will use jiffies (running at HZ) as the > default sched_clock. > > To avoid this, we explicity provide sched_clock using RISC-V rdtime > instruction (similar to riscv_timer clocksource). > > Signed-off-by: Anup Patel Hi Anup, the GENERIC_SCHED_CLOCK dependency in the Kconfig is missing. Thanks > --- > drivers/clocksource/riscv_timer.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c > index 084e97dc10ed..431892200a08 100644 > --- a/drivers/clocksource/riscv_timer.c > +++ b/drivers/clocksource/riscv_timer.c > @@ -8,6 +8,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs) > return get_cycles64(); > } > > +static u64 riscv_sched_clock(void) > +{ > + return get_cycles64(); > +} > + > static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = { > .name = "riscv_clocksource", > .rating = 300, > @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n) > cs = per_cpu_ptr(&riscv_clocksource, cpuid); > clocksource_register_hz(cs, riscv_timebase); > > + sched_clock_register(riscv_sched_clock, > + BITS_PER_LONG, riscv_timebase); > + > error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, > "clockevents/riscv/timer:starting", > riscv_timer_starting_cpu, riscv_timer_dying_cpu); > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog