From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 94FED21D590 for ; Wed, 27 May 2026 14:11:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779891085; cv=none; b=IS9qg5ECr9e5pDt8kkLCr9KHd0MraTx+Zj8Iyd6bfnvXQsAzg7qg55iniVC+oP8Wl+h7DTZj453QhD+BTAYEFYlj8ZsfSeHCwK6wvAaTcDwe5086oaKC0ccFJ+2bqf/PO/6hdCZFpX8BeyOq9VZ85eQz3aIZ+aopMn6zBNEpstg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779891085; c=relaxed/simple; bh=EMYKD7dIdvCyC3aowqIV2NFcZLZ0MI2QgKxgRFdYwcA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=U7HIV4lVDYOsScvv9d0Bhu1K+mCkP7eQELdyGcEYu9VOVJ/LIQhtfs3tVQnl135n3D0S5nE9BhxX7QQ6ao0q1VcjBRlNIlbLNfPiWLDch5KJFXCd1EJ4ZYYnl7c6pum09l15wdQlGGin4q2HxdTdxHPt8XNEA6CQiAsCeSy0Fxg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=AmDfBmlK; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="AmDfBmlK" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0043027DC; Wed, 27 May 2026 07:11:17 -0700 (PDT) Received: from [10.1.36.149] (XHFQ2J9959.cambridge.arm.com [10.1.36.149]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78AA23F905; Wed, 27 May 2026 07:11:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779891082; bh=EMYKD7dIdvCyC3aowqIV2NFcZLZ0MI2QgKxgRFdYwcA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=AmDfBmlKj8HpbsVvbsgw1jbwhZeeWkxSTV7bDMMlg1+bK8fvYnwMsP15d8wko/WWV VOCsPReMRJocbcAJFrEl1EauTUnoE9MZl3UrhBvyh0Jzu284YxDtTleOoXbU9Bh87j 17N44GEdiMwH6h8Tklbiu1n+jhO6WyD2SuZV25EE= Message-ID: Date: Wed, 27 May 2026 15:11:19 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC V2 07/14] arm64/mm: Route all pgtable reads via pxxval_get() Content-Language: en-GB To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Will Deacon , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , Usama Arif , linux-kernel@vger.kernel.org, linux-mm@kvack.org References: <20260513044547.4128549-1-anshuman.khandual@arm.com> <20260513044547.4128549-8-anshuman.khandual@arm.com> From: Ryan Roberts In-Reply-To: <20260513044547.4128549-8-anshuman.khandual@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13/05/2026 05:45, Anshuman Khandual wrote: > Define arm64 platform specific implementations for new pXdp_get() helpers. > These resolve into READ_ONCE(), thus ensuring required single copy atomic > semantics for the page table entry reads. > > In future this infrastructure can be used for D128 to maintain single copy > atomicity semantics with inline asm blocks. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Ryan Roberts > Cc: Mark Rutland > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual > --- > Changes in RFC V2: > > - Renamed all ptdesc_ instances as pxxval_ instead > - Moved arm64 pgtable header READ_ONCE() replacements here in this patch > > arch/arm64/include/asm/pgtable.h | 38 +++++++++++++++++++++++++++----- > 1 file changed, 32 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h > index cefe8ab86acd..72da582e8d12 100644 > --- a/arch/arm64/include/asm/pgtable.h > +++ b/arch/arm64/include/asm/pgtable.h > @@ -84,6 +84,32 @@ static inline void arch_leave_lazy_mmu_mode(void) > arch_flush_lazy_mmu_mode(); > } > > +#define pxxval_get(x) READ_ONCE(x) I think this would be better as an inline (or __force_inline) function, which takes a pointer, and dereferences it. READ_ONCE() is special - it's modifying how the dereference should be done, so it makes sense that the dereference is done in the caller. > + > +#define pmdp_get pmdp_get > +static inline pmd_t pmdp_get(pmd_t *pmdp) > +{ > + return pxxval_get(*pmdp); This is weird to read. It would be clearer as: return pxxval_get(pmdp); Thanks, Ryan > +} > + > +#define pudp_get pudp_get > +static inline pud_t pudp_get(pud_t *pudp) > +{ > + return pxxval_get(*pudp); > +} > + > +#define p4dp_get p4dp_get > +static inline p4d_t p4dp_get(p4d_t *p4dp) > +{ > + return pxxval_get(*p4dp); > +} > + > +#define pgdp_get pgdp_get > +static inline pgd_t pgdp_get(pgd_t *pgdp) > +{ > + return pxxval_get(*pgdp); > +} > + > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE > > @@ -380,7 +406,7 @@ static inline void __set_pte(pte_t *ptep, pte_t pte) > > static inline pte_t __ptep_get(pte_t *ptep) > { > - return READ_ONCE(*ptep); > + return pxxval_get(*ptep); > } > > extern void __sync_icache_dcache(pte_t pteval); > @@ -1011,7 +1037,7 @@ static inline phys_addr_t pud_offset_phys(p4d_t *p4dp, unsigned long addr) > { > BUG_ON(!pgtable_l4_enabled()); > > - return p4d_page_paddr(READ_ONCE(*p4dp)) + pud_index(addr) * sizeof(pud_t); > + return p4d_page_paddr(p4dp_get(p4dp)) + pud_index(addr) * sizeof(pud_t); > } > > static inline > @@ -1025,7 +1051,7 @@ pud_t *pud_offset_lockless(p4d_t *p4dp, p4d_t p4d, unsigned long addr) > > static inline pud_t *pud_offset(p4d_t *p4dp, unsigned long addr) > { > - return pud_offset_lockless(p4dp, READ_ONCE(*p4dp), addr); > + return pud_offset_lockless(p4dp, p4dp_get(p4dp), addr); > } > #define pud_offset pud_offset > > @@ -1134,7 +1160,7 @@ static inline phys_addr_t p4d_offset_phys(pgd_t *pgdp, unsigned long addr) > { > BUG_ON(!pgtable_l5_enabled()); > > - return pgd_page_paddr(READ_ONCE(*pgdp)) + p4d_index(addr) * sizeof(p4d_t); > + return pgd_page_paddr(pgdp_get(pgdp)) + p4d_index(addr) * sizeof(p4d_t); > } > > static inline > @@ -1148,7 +1174,7 @@ p4d_t *p4d_offset_lockless(pgd_t *pgdp, pgd_t pgd, unsigned long addr) > > static inline p4d_t *p4d_offset(pgd_t *pgdp, unsigned long addr) > { > - return p4d_offset_lockless(pgdp, READ_ONCE(*pgdp), addr); > + return p4d_offset_lockless(pgdp, pgdp_get(pgdp), addr); > } > > static inline p4d_t *p4d_set_fixmap(unsigned long addr) > @@ -1346,7 +1372,7 @@ static inline bool pmdp_test_and_clear_young(struct vm_area_struct *vma, > unsigned long address, pmd_t *pmdp) > { > /* Operation applies to PMD table entry only if FEAT_HAFT is enabled */ > - VM_WARN_ON(pmd_table(READ_ONCE(*pmdp)) && !system_supports_haft()); > + VM_WARN_ON(pmd_table(pmdp_get(pmdp)) && !system_supports_haft()); > return __ptep_test_and_clear_young(vma, address, (pte_t *)pmdp); > } > #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */