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Tue, 30 Jun 2026 04:09:49 -0700 (PDT) X-Received: by 2002:a05:622a:144b:b0:517:8999:6c50 with SMTP id d75a77b69052e-51c108c7170mr26921141cf.8.1782817789233; Tue, 30 Jun 2026 04:09:49 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1288f0cc89sm106550266b.36.2026.06.30.04.09.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Jun 2026 04:09:48 -0700 (PDT) Message-ID: Date: Tue, 30 Jun 2026 13:09:45 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm64: dts: qcom: sm8550: add SDHC4 controller node To: Vladimir Zapolskiy , William Bright Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ram Boukobza , Tendai Makumire References: <20260427-sm8550-sdhc4-support-v2-1-a4241f43ecd5@imd-tec.com> <5a5cbf8f-07ef-419a-8d30-c1b0b2786312@linaro.org> <00643a25-040a-4bec-8324-f52b30d84f9f@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: rikQSdyYNKZ_BjFqX6uMwktaMLdxu6lT X-Proofpoint-Spam-Info: AW1haW4tMjYwNjMwMDEwMiBTYWx0ZWRfX6plX1evZCBPs 0YYFc7bzDqj3vV5To7KMnBpNsFRMWB42jlfPd9cTVIUDFC1Hld6YYGyispr1Vhw/ITVpPn4zsMV oI0N9LPeI2ROubvE7Z3Vsw51t4iLn6I= X-Authority-Analysis: v=2.4 cv=JI0LdcKb c=1 sm=1 tr=0 ts=6a43a3fe cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=gNcS5RXMAAAA:8 a=IaU93oFJTrkeP9POlkQA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=VeqYHxXNbGx7SVBbL1V1:22 X-Proofpoint-ORIG-GUID: rikQSdyYNKZ_BjFqX6uMwktaMLdxu6lT X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjMwMDEwMiBTYWx0ZWRfX1h0+g6jwmGs4 10aoFmMawS1izfv7UdnTxnhgiPcjg4uxYl80e0pz8TK7Gdu829O0/00DaT/3qrZXyZ++SOrgN/u teja04mkiCd67l3hiFAa5J3n4QuMhrlPVFBL5Xq1HffI+y8yevE54qJ+vg5pVcQouNx6H3MDb0/ CBwlKX5dJDqlSVPbeGxk9941H1nMulW9AUzZeI9slD0druM/EeAyXheaalGV3E3lR/Vi2V/soJx 9ltzZPIqYeEITd/cppitEvjtIzZeetRsYYo+fKXh6jRn6KTF88U0CQ+t1VndqoTaVb5fRnaPyZT VkR/8c+tkbxO1fY45PCtbwKVxjzwbpwr5/3v3b/RfyEL6e6MyuhU9u6+gay25W1BpY+C74lGgcK 3mPHn+FfUtBnWshB2PmeVMRcH5t+qJMuQZKfhO3y+uUOLmRc6EpPBmJOF7vQNp/G2ckfdmE/1QF 4Ky06XHaB/dA5/zpWzA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-30_03,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 impostorscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606300102 On 6/12/26 11:11 AM, Vladimir Zapolskiy wrote: > On 6/12/26 11:47, William Bright wrote: >> On Thu, Jun 11, 2026 at 10:48:34AM +0300, Vladimir Zapolskiy wrote: >>> Looks like the SDHC driver behaves expectedly then. For me it's hard to say >>> what may be the rootcause, I believe the lower bus frequency should be fine, >>> so it sounds like a hardware issue, but could it be PCB/board specific one? >>> >>> If you find a chance to copy the SDHC driver (and its small dependencies) >>> from Android and test it on your board, and if it also fails, then it might >>> be well concluded that something is wrong with hardware, still it won't be >>> quite convincing that the SoC SDHC is to blame here. >>> >>> Hope it helps. >>> >> My colleague Tendai () had the same issue >> with dll-tuning failing in SDR50 when working on the downstream 5.15 msm >> kernel [1]. I have a "feature table" and it says SM8550->SDC4->DLL [Y/N] -> No no wonder it fails the tuning if it's not present (or that's at least my interpretation of this doc..) There's some notes about the frequency being limited to 75 MHz in SDR50 and to 37.5 in DDR50. The supported modes are DS, HS, SDR12, SDR25, SDR50 and DDR50 (with the caveat above). Konrad