From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Marijn Suijten <marijn.suijten@somainline.org>
Cc: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
David Airlie <airlied@gmail.com>, Vinod Koul <vkoul@kernel.org>,
Simona Vetter <simona@ffwll.ch>, <linux-arm-msm@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>,
Jordan Crouse <jordan@cosmicpenguin.net>,
<~postmarketos/upstreaming@lists.sr.ht>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Martin Botka <martin.botka@somainline.org>,
Jami Kettunen <jami.kettunen@somainline.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v2 2/3] drm/msm/dsi: Set PHY usescase (and mode) before registering DSI host
Date: Wed, 12 Feb 2025 17:13:08 -0800 [thread overview]
Message-ID: <ca80bd37-3b3f-48d3-a57d-2440d20d0c6c@quicinc.com> (raw)
In-Reply-To: <c5503020-0224-428a-9452-f8d668b47caf@quicinc.com>
Hi Marijn
On 2/10/2025 2:17 PM, Abhinav Kumar wrote:
>
>
> On 2/10/2025 6:24 AM, Dmitry Baryshkov wrote:
>> On Mon, Feb 10, 2025 at 01:54:29PM +0100, Marijn Suijten wrote:
>>> On 2025-02-10 01:11:59, Dmitry Baryshkov wrote:
>>>> On Sun, Feb 09, 2025 at 10:42:53PM +0100, Marijn Suijten wrote:
>>>>> Ordering issues here cause an uninitialized (default STANDALONE)
>>>>> usecase to be programmed (which appears to be a MUX) in some cases
>>>>> when msm_dsi_host_register() is called, leading to the slave PLL in
>>>>> bonded-DSI mode to source from a clock parent (dsi1vco) that is off.
>>>>>
>>>>> This should seemingly not be a problem as the actual dispcc clocks
>>>>> from
>>>>> DSI1 that are muxed in the clock tree of DSI0 are way further down,
>>>>> this
>>>>> bit still seems to have an effect on them somehow and causes the right
>>>>> side of the panel controlled by DSI1 to not function.
>>>>>
>>>>> In an ideal world this code is refactored to no longer have such
>>>>> error-prone calls "across subsystems", and instead model the "PLL src"
>>>>> register field as a regular mux so that changing the clock parents
>>>>> programmatically or in DTS via `assigned-clock-parents` has the
>>>>> desired effect.
>>>>> But for the avid reader, the clocks that we *are* muxing into DSI0's
>>>>> tree are way further down, so if this bit turns out to be a simple mux
>>>>> between dsiXvco and out_div, that shouldn't have any effect as this
>>>>> whole tree is off anyway.
>>>>>
>>>>> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
>>>>> ---
>>>>> drivers/gpu/drm/msm/dsi/dsi_manager.c | 30 ++++++++++++++++++
>>>>> +-----------
>>>>> 1 file changed, 19 insertions(+), 11 deletions(-)
>>>>
>>>>
>>>> Fixes: 57bf43389337 ("drm/msm/dsi: Pass down use case to PHY")
>>>
>>> I'm not exactly confident about that. Abhinav pointed out in
>>> https://gitlab.freedesktop.org/drm/msm/-/issues/41#note_2375646 that
>>> msm_dsi_host_register() was not supposed to be enabling the PHY, which I
>>> provided a counter-stacktrace for to show that is indeed the case.
>>>
>>> Either this was always a problem that's only become visible now (and
>>> it's an
>>> issue with that patch), or a different change causes
>>> msm_dsi_host_register()
>>> to enable the PHY and program the usecase too early?
>>
>> As currently usecase is being programmed after the DSI host being
>> registered, there might be a race condition between panel driver probe
>> _and_ usecase programming.
>>
>>>
>>> What do you think?
>>>
>>> - Marijn
>>>
>
> Yes I agree with Dmitry's explanation. The race condition between the
> two can cause this. Hence I am also fine with this change.
>
>>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>>>>
>>>>>
>>>>> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/
>>>>> drm/msm/dsi/dsi_manager.c
>>>>> index
>>>>> a210b7c9e5ca281a46fbdb226e25832719a684ea..b93205c034e4acc73d536deeddce6ebd694b4a80 100644
>>>>> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
>>>>> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
>>>>> @@ -74,17 +74,33 @@ static int dsi_mgr_setup_components(int id)
>>>>> int ret;
>>>>> if (!IS_BONDED_DSI()) {
>>>>> + /* Set the usecase before calling msm_dsi_host_register(),
>>>>> which would
>>>>> + * already program the PLL source mux based on a default
>>>>> usecase.
>>>>> + */
>>>>> + msm_dsi_phy_set_usecase(msm_dsi->phy,
>>>>> MSM_DSI_PHY_STANDALONE);
>>>>> + msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
>>>>> +
>>>>> ret = msm_dsi_host_register(msm_dsi->host);
>>>>> if (ret)
>>>>> return ret;
>>>>> -
>>>>> - msm_dsi_phy_set_usecase(msm_dsi->phy,
>>>>> MSM_DSI_PHY_STANDALONE);
>>>>> - msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
>>>>> } else if (other_dsi) {
>>>>> struct msm_dsi *master_link_dsi = IS_MASTER_DSI_LINK(id) ?
>>>>> msm_dsi : other_dsi;
>>>>> struct msm_dsi *slave_link_dsi = IS_MASTER_DSI_LINK(id) ?
>>>>> other_dsi : msm_dsi;
>>>>> +
>>>>> + /* PLL0 is to drive both DSI link clocks in bonded DSI mode.
>>>>> + *
>>>>> + /* Set the usecase before calling msm_dsi_host_register(),
>>>>> which would
>>>>> + * already program the PLL source mux based on a default
>>>>> usecase.
>>>>> + */
My compiler is throwing a warning here
drivers/gpu/drm/msm/dsi/dsi_manager.c: In function
'dsi_mgr_setup_components':
drivers/gpu/drm/msm/dsi/dsi_manager.c:94:3: warning: "/*" within comment
[-Wcomment]
/* Set the usecase before calling msm_dsi_host_register(), which would
^
drivers/gpu/drm/msm/dsi/dsi_manager.c: At top level:
Can you pls address this one so that I can pick this one up?
Thanks
Abhinav
next prev parent reply other threads:[~2025-02-13 1:13 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-09 21:42 [PATCH v2 0/3] drm/msm: Initial fixes for DUALPIPE (+DSC) topology Marijn Suijten
2025-02-09 21:42 ` [PATCH v2 1/3] drm/msm/dsi: Use existing per-interface slice count in DSC timing Marijn Suijten
2025-02-11 1:51 ` Jessica Zhang
2025-02-11 3:42 ` Dmitry Baryshkov
2025-02-09 21:42 ` [PATCH v2 2/3] drm/msm/dsi: Set PHY usescase (and mode) before registering DSI host Marijn Suijten
2025-02-09 23:11 ` Dmitry Baryshkov
2025-02-10 12:54 ` Marijn Suijten
2025-02-10 14:24 ` Dmitry Baryshkov
2025-02-10 22:17 ` Abhinav Kumar
2025-02-13 1:13 ` Abhinav Kumar [this message]
2025-02-13 2:13 ` Dmitry Baryshkov
2025-02-16 23:06 ` Marijn Suijten
2025-02-17 0:48 ` Dmitry Baryshkov
2025-02-09 23:28 ` Abhinav Kumar
2025-02-09 21:42 ` [PATCH v2 3/3] drm/msm/dpu: Remove arbitrary limit of 1 interface in DSC topology Marijn Suijten
2025-02-09 23:13 ` Dmitry Baryshkov
2025-02-11 1:54 ` Jessica Zhang
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