From: Perry Yuan <Perry.Yuan@amd.com>
To: <rafael.j.wysocki@intel.com>, <viresh.kumar@linaro.org>,
<Ray.Huang@amd.com>
Cc: <Deepak.Sharma@amd.com>, <Mario.Limonciello@amd.com>,
<Nathan.Fontenot@amd.com>, <Alexander.Deucher@amd.com>,
<Jinzhou.Su@amd.com>, <Xinmei.Huang@amd.com>,
<Xiaojian.Du@amd.com>, <Li.Meng@amd.com>,
<linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Perry Yuan <Perry.Yuan@amd.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>, <x86@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>,
Huang Rui <ray.huang@amd.com>, Tony Luck <tony.luck@intel.com>,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Subject: [PATCH v3 01/13] x86/msr: Add the MSR definition for AMD CPPC hardware control.
Date: Tue, 12 Jul 2022 11:35:36 -0400 [thread overview]
Message-ID: <ca830355f1470ce53cd56917b0adee66c0b50f00.1657638462.git.Perry.Yuan@amd.com> (raw)
In-Reply-To: <cover.1657638462.git.Perry.Yuan@amd.com>
This MSR can be used for controlling whether the CPU boost state
is enabled in the hardware.
AMD Processor Programming Reference (PPR)
Link: https://www.amd.com/system/files/TechDocs/40332.pdf [p1095]
Link: https://www.amd.com/system/files/TechDocs/56569-A1-PUB.zip [p162]
Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
arch/x86/include/asm/msr-index.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index d27e0581b777..869508de8269 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -548,6 +548,7 @@
#define MSR_AMD_CPPC_CAP2 0xc00102b2
#define MSR_AMD_CPPC_REQ 0xc00102b3
#define MSR_AMD_CPPC_STATUS 0xc00102b4
+#define MSR_AMD_CPPC_HW_CTL 0xc0010015
#define AMD_CPPC_LOWEST_PERF(x) (((x) >> 0) & 0xff)
#define AMD_CPPC_LOWNONLIN_PERF(x) (((x) >> 8) & 0xff)
--
2.25.1
next prev parent reply other threads:[~2022-07-12 15:36 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-12 15:32 [PATCH v3 00/13] AMD Pstate Enhancement And Issue Fixs Perry Yuan
2022-07-12 15:35 ` Perry Yuan [this message]
2022-07-12 15:39 ` [PATCH v3 02/13] cpufreq: amd-pstate: enable AMD Precision Boost mode switch Perry Yuan
2022-07-12 15:40 ` [PATCH v3 03/13] cpufreq: amd-pstate: cleanup the unused and duplicated headers declaration Perry Yuan
2022-07-13 5:27 ` Viresh Kumar
2022-07-12 15:40 ` [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init() Perry Yuan
2022-07-13 5:27 ` Viresh Kumar
2022-07-13 5:57 ` Yuan, Perry
2022-07-12 15:40 ` [PATCH v3 05/13] cpufreq: amd-pstate: simplify cpudata pointer assignment Perry Yuan
2022-07-13 5:27 ` Viresh Kumar
2022-07-12 15:41 ` [PATCH v3 06/13] cpufreq: amd_pstate: fix wrong lowest perf fetch Perry Yuan
2022-07-13 5:27 ` Viresh Kumar
2022-07-12 15:41 ` [PATCH v3 07/13] cpufreq: amd_pstate: map desired perf into pstate scope for powersave governor Perry Yuan
2022-07-12 15:41 ` [PATCH v3 08/13] cpufreq: amd-pstate: fix white-space Perry Yuan
2022-07-13 5:28 ` Viresh Kumar
2022-07-12 15:42 ` [PATCH v3 09/13] cpufreq: amd-pstate: update pstate frequency transition delay time Perry Yuan
2022-07-13 5:28 ` Viresh Kumar
2022-07-12 15:42 ` [PATCH v3 10/13] cpufreq: amd-pstate: add ACPI disabled check in acpi_cpc_valid() Perry Yuan
2022-07-12 15:42 ` [PATCH v3 11/13] cpufreq: amd_pstate: update transition delay time to 1ms Perry Yuan
2022-07-13 5:29 ` Viresh Kumar
2022-07-12 15:43 ` [PATCH v3 12/13] arch_topology: remove the acpi_disabled check Perry Yuan
2022-07-13 5:29 ` Viresh Kumar
2022-07-13 14:40 ` Sudeep Holla
2022-07-12 15:43 ` [PATCH v3 13/13] cpufreq: CPPC: " Perry Yuan
2022-07-13 5:29 ` Viresh Kumar
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