Re: [PATCH V2 0/4] KVM: x86/pmu: Add hardware Topdown metrics support

["Chen, Zide" <zide.chen@intel.com>]

On 6/10/2026 5:03 PM, Sean Christopherson wrote:
> On Thu, Apr 23, 2026, Zide Chen wrote:
>> The Top-Down Microarchitecture Analysis (TMA) method is a structured
>> approach for identifying performance bottlenecks in out-of-order
>> processors.
>>
>> Currently, guests support the TMA method by collecting Topdown events
>> using GP counters, which may trigger multiplexing.  To free up scarce
>> GP counters, eliminate multiplexing-induced skew, and obtain coherent
>> Topdown metric ratios, it is desirable to expose fixed counter 3 and
>> the IA32_PERF_METRICS MSR to guests.
>>
>> Several attempts have been made to virtualize this under the legacy
>> vPMU model [1][2][3], but they were unsuccessful.  With the new mediated
>> vPMU, enabling TMA support in guests becomes much simpler.  It avoids
>> invasive changes to the perf core, eliminates CPU pinning and
>> fixed-counter affinity issues, and reduces the latge overhead of
>> trapping and emulating MSR accesses.
> 
> Please submit a new version of this to address Dapeng's feedback, rebase on the
> latest kvm-x86/next, and perhaps most importantly, to let Sashiko take a crack
> at it.

Yes, will submit V3 in coming days.
> Thanks!