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[74.57.247.14]) by smtp.gmail.com with ESMTPSA id 24sm12916968qkp.65.2018.12.03.14.25.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Dec 2018 14:25:47 -0800 (PST) Subject: Re: [Freedreno] [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes To: freedreno@lists.freedesktop.org, Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , festevam@gmail.com, Sascha Hauer , open list , Rob Herring , Chris.Healy@zii.aero, Pengutronix Kernel Team , Fabio Estevam , Shawn Guo , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , NXP Linux Team References: <20181203211816.5129-1-jonathan@marek.ca> <20181203211816.5129-4-jonathan@marek.ca> <20181203221032.GA20602@jcrouse-lnx.qualcomm.com> From: Jonathan marek Message-ID: Date: Mon, 3 Dec 2018 17:23:10 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <20181203221032.GA20602@jcrouse-lnx.qualcomm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/03/2018 05:10 PM, Jordan Crouse wrote: > On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote: >> Signed-off-by: Jonathan Marek >> --- >> arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++ >> 2 files changed, 34 insertions(+) >> >> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi >> index 67d462715..e9a7bbce9 100644 >> --- a/arch/arm/boot/dts/imx51.dtsi >> +++ b/arch/arm/boot/dts/imx51.dtsi >> @@ -628,5 +628,22 @@ >> clock-names = "ipg", "ahb"; >> }; >> }; >> + >> + gpu: gpu@30000000 { >> + compatible = "amd,imageon-200.1", "amd,imageon"; >> + reg = <0x30000000 0x20000>; >> + reg-names = "kgsl_3d0_reg_memory"; >> + interrupts = <12>; >> + interrupt-names = "kgsl_3d0_irq"; >> + clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>; >> + clock-names = "core_clk", "mem_iface_clk"; >> + >> + qcom,gpu-pwrlevels { >> + compatible = "qcom,gpu-pwrlevels"; >> + qcom,gpu-pwrlevel@0 { >> + qcom,gpu-freq = <166250000>; >> + }; >> + }; > > There shouldn't be any incremental cost in the source code to use OPP; it should > just work. And then this won't give us a further reason to keep the legacy > code around when we decide to dump any pretense of downstream "compatibility". > I will switch to OPP. >> + }; >> }; >> }; >> diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi >> index 207eb557c..586d45586 100644 >> --- a/arch/arm/boot/dts/imx53.dtsi >> +++ b/arch/arm/boot/dts/imx53.dtsi >> @@ -838,5 +838,22 @@ >> reg = <0xf8000000 0x20000>; >> clocks = <&clks IMX5_CLK_OCRAM>; >> }; >> + >> + gpu: gpu@30000000 { >> + compatible = "amd,imageon-200.0", "amd,imageon"; >> + reg = <0x30000000 0x20000>; >> + reg-names = "kgsl_3d0_reg_memory"; >> + interrupts = <12>; >> + interrupt-names = "kgsl_3d0_irq"; >> + clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>; >> + clock-names = "core_clk", "mem_iface_clk"; >> + >> + qcom,gpu-pwrlevels { >> + compatible = "qcom,gpu-pwrlevels"; >> + qcom,gpu-pwrlevel@0 { >> + qcom,gpu-freq = <200000000>; >> + }; > > Same. > >> + }; > >> + }; >> }; >> }; >> -- >> 2.17.1 >