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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id p1-20020a19f001000000b004f1406b059asm747276lfc.219.2023.05.26.12.39.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 May 2023 12:39:45 -0700 (PDT) Message-ID: Date: Fri, 26 May 2023 21:39:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v2] soc: qcom: ocmem: Add OCMEM hardware version print Content-Language: en-US To: Luca Weiss , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Andy Gross , Bjorn Andersson , Brian Masney Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230509-ocmem-hwver-v2-1-8c8793a07dfc@z3ntu.xyz> From: Konrad Dybcio In-Reply-To: <20230509-ocmem-hwver-v2-1-8c8793a07dfc@z3ntu.xyz> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23.05.2023 22:32, Luca Weiss wrote: > It might be useful to know what hardware version of the OCMEM block the > SoC contains. Add a debug print for that. > > Signed-off-by: Luca Weiss > --- > This patch is depends on [0] but could also be applied in the other > order, if conflicts are resolved. > > [0] https://lore.kernel.org/linux-arm-msm/20230506-msm8226-ocmem-v1-1-3e24e2724f01@z3ntu.xyz/ > --- > Changes in v2: > - Use FIELD_GET macros for getting correct bits from register (take > wording from mdp5: major, minor, step which hopefully is sort of > accurate) Qualcomm uses that (or that-ish) nomenclature for many hw blocks, so it's likely spot on. > - Link to v1: https://lore.kernel.org/r/20230509-ocmem-hwver-v1-1-b83ece3f2168@z3ntu.xyz > --- > drivers/soc/qcom/ocmem.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/soc/qcom/ocmem.c b/drivers/soc/qcom/ocmem.c > index c3e78411c637..9f7c3348cbb9 100644 > --- a/drivers/soc/qcom/ocmem.c > +++ b/drivers/soc/qcom/ocmem.c > @@ -76,6 +76,10 @@ struct ocmem { > #define OCMEM_REG_GFX_MPU_START 0x00001004 > #define OCMEM_REG_GFX_MPU_END 0x00001008 > > +#define OCMEM_HW_VERSION_MAJOR(val) FIELD_GET(GENMASK(31, 28), val) > +#define OCMEM_HW_VERSION_MINOR(val) FIELD_GET(GENMASK(27, 16), val) > +#define OCMEM_HW_VERSION_STEP(val) FIELD_GET(GENMASK(15, 0), val) > + > #define OCMEM_HW_PROFILE_NUM_PORTS(val) FIELD_GET(0x0000000f, (val)) > #define OCMEM_HW_PROFILE_NUM_MACROS(val) FIELD_GET(0x00003f00, (val)) > > @@ -355,6 +359,11 @@ static int ocmem_dev_probe(struct platform_device *pdev) > } > } > > + reg = ocmem_read(ocmem, OCMEM_REG_HW_VERSION); > + dev_dbg(dev, "OCMEM hardware version: %ld.%ld.%ld\n", reg is an unsigned long (u32), this should probably be %u > + OCMEM_HW_VERSION_MAJOR(reg), OCMEM_HW_VERSION_MINOR(reg), > + OCMEM_HW_VERSION_STEP(reg)); Nit: one per line would make this the tiniest bit easier to read Konrad > + > reg = ocmem_read(ocmem, OCMEM_REG_HW_PROFILE); > ocmem->num_ports = OCMEM_HW_PROFILE_NUM_PORTS(reg); > ocmem->num_macros = OCMEM_HW_PROFILE_NUM_MACROS(reg); > > --- > base-commit: 8705151771af822ac794b44504cd72eebc423499 > change-id: 20230509-ocmem-hwver-99bcb33b028b > > Best regards,