Re: [PATCH 2/2] perf/x86: Disable precise sampling for PERF_SAMPLE_STACK_USER

["Mi, Dapeng" <dapeng1.mi@linux.intel.com>]

On 9/8/2026 6:19 PM, Peter Zijlstra wrote:
> On Tue, Sep 08, 2026 at 04:56:22PM +0800, Mi, Dapeng wrote:
>> On 9/8/2026 4:49 PM, Peter Zijlstra wrote:
>>> On Tue, Sep 08, 2026 at 03:51:02PM +0800, Dapeng Mi wrote:
>>>> PERF_SAMPLE_STACK_USER needs to return the user stack and user registers
>>>> to user space when the PMI exits. Since the skid from the PEBS/IBS sample
>>>> and PMI delivery, the PEBS/IBS register snapshot (especially IP/SP/BP)
>>>> can diverge from the user stack at PMI return. That mismatch breaks DWARF
>>>> unwinding.
>>>>
>>>> Precise sampling provides no benefit in this case, so disable PEBS/IBS
>>>> precise sampling and allow only PMI-based sampling when
>>>> PERF_SAMPLE_STACK_USER is requested.
>>>>
>>>> Reported-by: Gennady Kupava <gennady.kupava@gmail.com>
>>>> Closes: https://lore.kernel.org/all/CAPu-DQqF0aF6=GS8Z6KKWeeX_V5LiXeKU_rJQZC+uGg8zuTPNw@mail.gmail.com/
>>>> Cc: Ravi Bangoria <ravi.bangoria@amd.com>
>>>> Fixes: c5ebcedb566e ("perf: Add ability to attach user stack dump to sample")
>>>> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
>>> This breaks long standing existing behaviour.
>> Yeah, but it seems there is no better way to fix this issue.
> Breaking things that worked before isn't fixing.. people get upset.
>
>> An alternative way to fix this issue is still to return the PMI
>> context register state rather than the PEBS precise registers for user
>> stack sampling, but this actually falls back the imprecise PMI-based
>> sampling. 
> That's what we already do, no? I have distinct memories of making the
> stack unwind use the NMI regs rather then the PEBS regs.

Unfortunately it's not. :(

Currently pt_regs->ip would be unconditionally overwritten by PEBS/IBS
snapshotted IP register value, and then the pt_regs->ip is used to
generated the SAMPLE_IP.

    if (filtered_sample_type & PERF_SAMPLE_IP) {
        data->ip = perf_instruction_pointer(event, regs);
        data->sample_flags |= PERF_SAMPLE_IP;
    }

As Ian suggested, the better way to fix this issue could be to decouple
PERF_SAMPLE_IP and PERF_REG_X86_IP. PERF_SAMPLE_IP still stores the precise
IP from PEBS/IBS, but the whole user register snapshot keeps the PMI
context registers. DWARF depends on the user register snapshot to unwind
the call chain instead of PERF_SAMPLE_IP.

I would follow this way and send V2 patches. 

Thanks.


>
>> In my opinion, it could even make the thing worse. User
>> requires to get precise samplings, but perf silently returns imprecise
>> records, this would mislead user. 
> Mostly just the unwind might be off a little, the rest is accurate. This
> has been the case 'forever'. Performance analysis isn't for silly
> people, if they can't deal with a little fuzz then perhaps they're in
> the wrong business.