From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFEBBC433E6 for ; Wed, 15 Jul 2020 18:44:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A15FF2065F for ; Wed, 15 Jul 2020 18:44:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="HJBm7iTE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726986AbgGOSoO (ORCPT ); Wed, 15 Jul 2020 14:44:14 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57136 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726465AbgGOSoO (ORCPT ); Wed, 15 Jul 2020 14:44:14 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 06FIhv2K036134; Wed, 15 Jul 2020 13:43:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594838637; bh=ETxMORbytoMFSSDE/0XGG8wkFT+afuxOfmweC84PIGM=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=HJBm7iTEK7Qapy+9+FfuJgtNwQi9eA36zxGtY/099/ZLdi2lbCaer+bUn99iTl6S+ bPs77L3IT+JcQQQs0hrW8FDYyDlIrm6bfOdmxq80OD5uaSgaKG1Zpl8B4KXXblclwY RLLfo2pBvSAyEy4KijTXv5KhFAD1KoK6Q9wnmpI8= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 06FIhvDi124279 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 15 Jul 2020 13:43:57 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 15 Jul 2020 13:43:57 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 15 Jul 2020 13:43:57 -0500 Received: from [10.250.100.73] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06FIhsGT128678; Wed, 15 Jul 2020 13:43:55 -0500 Subject: Re: [PATCH] clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4 To: Tony Lindgren CC: Daniel Lezcano , Thomas Gleixner , , , , Carlos Hernandez References: <20200713162601.6829-1-tony@atomide.com> <1972bace-e9d1-b901-eb33-b4081a4b175d@ti.com> <20200715173211.GA10993@atomide.com> From: Grygorii Strashko Message-ID: Date: Wed, 15 Jul 2020 21:43:47 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200715173211.GA10993@atomide.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/07/2020 20:32, Tony Lindgren wrote: > * Grygorii Strashko [200715 10:17]: >> On 13/07/2020 19:26, Tony Lindgren wrote: >>> @@ -653,8 +679,8 @@ static int __init dmtimer_clocksource_init(struct device_node *np) >>> dev->mask = CLOCKSOURCE_MASK(32); >>> dev->flags = CLOCK_SOURCE_IS_CONTINUOUS; >>> - if (of_device_is_compatible(np, "ti,am33xx") || >>> - of_device_is_compatible(np, "ti,am43")) { >>> + /* Unlike for clockevent, legacy code sets suspend only for am4 */ >>> + if (of_machine_is_compatible("ti,am43")) { >>> dev->suspend = dmtimer_clocksource_suspend; >>> dev->resume = dmtimer_clocksource_resume; >>> } >>> >> >> It might be better to use SOC_BUS infra here, which is available on OMAP platforms by default, >> instead if DT. What do you think? > > Well we have time_init() run very early, and some SoCs have only external > timers. So timer-ti-dm-systimer must be initialized early. And I think > soc_device_match() depends on soc_bus_register() that runs later at > core_initcall(). Ah. right it's early init. I revoke my proposal then. > > If you are thinking of something else, or we can use soc_device_match() > early, sure :) But sounds like that change should be a separate patch > then. > > The reason for why we need to check for the SoC, we have the compatible > for ti,am335x-timer already in use on am3/4 and dm814x, so we can't use > TIMER_OF_DECLARE alone here. -- Best regards, grygorii