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Mon, 29 Jun 2026 04:08:15 -0700 (PDT) X-Received: by 2002:a05:6102:8017:b0:738:a78f:5483 with SMTP id ada2fe7eead31-738a78f5743mr462596137.2.1782731294673; Mon, 29 Jun 2026 04:08:14 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-697f4bd36adsm6984719a12.27.2026.06.29.04.08.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jun 2026 04:08:13 -0700 (PDT) Message-ID: Date: Mon, 29 Jun 2026 13:08:08 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 1/6] soc: qcom: ice: Add OPP-based clock scaling support for ICE To: Abhinaba Rakshit Cc: Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Adrian Hunter , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neeraj Soni , Harshal Dev , Kuldeep Singh , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org References: <20260609-enable-ice-clock-scaling-v11-0-1cebc8b3275b@oss.qualcomm.com> <20260609-enable-ice-clock-scaling-v11-1-1cebc8b3275b@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjI5MDA5MSBTYWx0ZWRfX5YQMMB1e0Pok NZvsn4ej3l6V5Fk1HsJ2lRF6KxslVvCGMICRs02+mMr+r5O5RdyL86TbclJi7AnbgOtjlLequRY eXcwO7bXEUbuHjVDyz925GMPmtv8pjhCUMBbY7ANcxSeY+KioRk5Y1fP6IFQEutNW+EcnTWs1eq q/0cUxY2A/3Btk3OdVN0GneYW5XRYyoR2bsIf9Foi63sPiA9N2WI23G1ZzLHCAks4sXAeCcm3ru UJDeQ+ua2lJladK2ncpJVJGS4zx5l91mYqO2+4R93t8M75Y736xdjyDUlAmt2inWH2W8qNqCTPm BN1Di+YTsKSoxErDQKIpHxWL8EC6Oy1L2QHRHeFBsiBkY8C7HyU+rHgVeCQZYMUbM8XToc5FdUh RoUd6FYy6fRii0ZGqvMPX7NqL+Eae2Hg/lGT7FzqMX5pGRR4oWMiyfRVr67ojnXQmyZnUrkJ5B9 wjBfOfUlKpJPtADh9dw== X-Proofpoint-ORIG-GUID: JjZoQ5Gk2Ej9HxskmKitUxsjKQRfef8T X-Authority-Analysis: v=2.4 cv=T6q8ifKQ c=1 sm=1 tr=0 ts=6a425220 cx=c_pps a=wuOIiItHwq1biOnFUQQHKA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Y01jbQKe1eecyiKPCdgA:9 a=QEXdDO2ut3YA:10 a=XD7yVLdPMpWraOa8Un9W:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjI5MDA5MSBTYWx0ZWRfX5K5opr/cCqsG LV1ClTXtOJpN4OxNTRl6JgsICWRe9PtXY9+CP4qnljQSKCzIwiW8vEKMUs9lE9qqxohgoUTEavi Uyrhh21fZsGkZDcRZI9cFzEKh5Zss2o= X-Proofpoint-GUID: JjZoQ5Gk2Ej9HxskmKitUxsjKQRfef8T X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-29_03,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606290091 On 6/22/26 9:34 AM, Abhinaba Rakshit wrote: > On Thu, Jun 18, 2026 at 03:01:54PM +0200, Konrad Dybcio wrote: >> On 6/8/26 11:47 PM, Abhinaba Rakshit wrote: >>> Register optional operation-points-v2 table for ICE device >>> during device probe. Attach the OPP-table with only the ICE >>> core clock. Since, dtbinding is on a transition phase to include >>> iface clock and clock-names, attaching the opp-table to core clock >>> remains optional such that it does not cause probe failures. >>> >>> Introduce clock scaling API qcom_ice_scale_clk which scale ICE >>> core clock based on the target frequency provided and if a valid >>> OPP-table is registered. Use round_ceil passed to decide on the >>> rounding of the clock freq against OPP-table. Clock scaling is >>> disabled when a valid OPP-table is not registered. >>> >>> This ensures when an ICE-device specific OPP table is available, >>> use the PM OPP framework to manage frequency scaling and maintain >>> proper power-domain constraints. >>> >>> Also, ensure to drop the votes in suspend to prevent power/thermal >>> retention. Subsequently restore the frequency in resume from >>> core_clk_freq which stores the last ICE core clock operating frequency. >>> >>> Reviewed-by: Harshal Dev >>> Signed-off-by: Abhinaba Rakshit >>> --- >> >> [...] >> >>> @@ -335,6 +342,11 @@ int qcom_ice_suspend(struct qcom_ice *ice) >>> { >>> clk_disable_unprepare(ice->iface_clk); >>> clk_disable_unprepare(ice->core_clk); >>> + >>> + /* Drop the clock votes while suspend */ >>> + if (ice->has_opp) >>> + dev_pm_opp_set_rate(ice->dev, 0); >> >> The PM core will quiesce the vote as the device suspends, this is >> unnecessary. Similarly, the rate restore logic will become unnecessary. >> Especially since dev_pm_opp_set_rate(0) does not actually do any rate >> setting. > > This section was earlier discussed in the patchset v4: > https://lore.kernel.org/all/7b219a50-6971-4a0c-a465-418f8abd5556@oss.qualcomm.com/ > The intention here was to drop the RPMh votes once the device goes to suspend same > as the storage drivers such as mmc drivers does: > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/mmc/host/sdhci-msm.c#n2946 > This was done to leave the hanging votes *on* for unused clocks. > > However, I get your point, due to mean to say that once device goes to suspend > and GDSC power-domain will be turned OFF, it will automatically quiesce the > performance votes? When the device's runtime state goes to 'suspended', all votes are dropped (which then propagates up the power domain tree, effectively lowering the vote which passes through the GDSC to the parent CX domain) i.e. "yes" Konrad