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From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Rob Herring <robh@kernel.org>
Cc: <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
	<pabeni@redhat.com>, <krzysztof.kozlowski+dt@linaro.org>,
	<linux@armlinux.org.uk>, <vladimir.oltean@nxp.com>,
	<grygorii.strashko@ti.com>, <vigneshr@ti.com>, <nsekhar@ti.com>,
	<netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <kishon@ti.com>,
	<s-vadapalli@ti.com>
Subject: Re: [PATCH v3 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G
Date: Fri, 10 Jun 2022 11:32:38 +0530	[thread overview]
Message-ID: <cca6368b-2d2f-2996-edd3-0daf32d120e1@ti.com> (raw)
In-Reply-To: <20220609182606.GA4024580-robh@kernel.org>

Hello Rob,

On 09/06/22 23:56, Rob Herring wrote:
> On Mon, Jun 06, 2022 at 04:34:41PM +0530, Siddharth Vadapalli wrote:
>> Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external
>> ports) CPSW5G module and add compatible for it.
>>
>> Changes made:
>>     - Add new compatible ti,j7200-cpswxg-nuss for CPSW5G.
>>     - Extend pattern properties for new compatible.
>>     - Change maximum number of CPSW ports to 4 for new compatible.
>>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> ---
>>  .../bindings/net/ti,k3-am654-cpsw-nuss.yaml   | 135 ++++++++++++------
>>  1 file changed, 93 insertions(+), 42 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
>> index b8281d8be940..49f63aaf5a08 100644
>> --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
>> +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
>> @@ -57,6 +57,7 @@ properties:
>>        - ti,am654-cpsw-nuss
>>        - ti,j721e-cpsw-nuss
>>        - ti,am642-cpsw-nuss
>> +      - ti,j7200-cpswxg-nuss
>>  
>>    reg:
>>      maxItems: 1
>> @@ -108,48 +109,98 @@ properties:
>>          const: 1
>>        '#size-cells':
>>          const: 0
>> -
>> -    patternProperties:
>> -      port@[1-2]:
> 
> Just change this to 'port@[1-4]'.
> 
>> -        type: object
>> -        description: CPSWxG NUSS external ports
>> -
>> -        $ref: ethernet-controller.yaml#
>> -
>> -        properties:
>> -          reg:
>> -            minimum: 1
>> -            maximum: 2
> 
> And this to 4.
> 
> Then, you just need this to disallow the additional ports:
> 
> if:
>   not:
>     properties:
>       compatible:
>         contains:
>           const: ti,j7200-cpswxg-nuss
> then:
>   patternProperties:
>     '^port@[3-4]$': false

Thank you for the suggestion. I will implement this and send the v4 series.

Regards,
Siddharth.

  reply	other threads:[~2022-06-10  6:03 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-06 11:04 [PATCH v3 0/3] J7200: CPSW5G: Add support for QSGMII mode to am65-cpsw driver Siddharth Vadapalli
2022-06-06 11:04 ` [PATCH v3 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200 CPSW5G Siddharth Vadapalli
2022-06-09 18:26   ` Rob Herring
2022-06-10  6:02     ` Siddharth Vadapalli [this message]
2022-06-06 11:04 ` [PATCH v3 2/3] net: ethernet: ti: am65-cpsw: Add support " Siddharth Vadapalli
2022-06-06 11:04 ` [PATCH v3 3/3] net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct location Siddharth Vadapalli

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