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Mon, 26 Oct 2026 21:08:18 -0700 (PDT) Received: from [10.239.96.176] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cd8cccb7802sm2054232a12.22.2026.10.26.21.08.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 26 Oct 2026 21:08:18 -0700 (PDT) Message-ID: Date: Tue, 27 Oct 2026 12:07:56 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v22 12/14] arm64: dts: qcom: kaanapali: Add CCI controller nodes To: Loic Poulain Cc: Bryan O'Donoghue , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Abel Vesa , linux-phy@lists.infradead.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jeyaprakash.soundrapandian@oss.qualcomm.com, Vijay Kumar Tumati , Konrad Dybcio References: <20261024-kaanapali-camss-v22-0-7da3ea49c8a1@oss.qualcomm.com> <20261024-kaanapali-camss-v22-12-7da3ea49c8a1@oss.qualcomm.com> Content-Language: en-US From: Hangxiang Ma In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI3MDAxNiBTYWx0ZWRfX1wH7O5s+Gicy r4p4+2x7DB9MW5PJscrIc9h44eSw+X9VAgtKVLBCdTQ3bsIau/XesEAWpmb4v2znryRShqhhDKe AdVcjTD87379mArdELU1XwgSh7NoL4w= X-Authority-Analysis: v=2.4 cv=ZOdCCn7b c=1 sm=1 tr=0 ts=6ae023b4 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=VpRCVQi9ATEJuri8zQAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-GUID: qc-oLqDazSZqUKA3YX9_lLEWylZh0kcV X-Proofpoint-ORIG-GUID: qc-oLqDazSZqUKA3YX9_lLEWylZh0kcV X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDAxNiBTYWx0ZWRfX31QGu3ojq/Lr QpRKTmTxlizm+PpbCap7d73PNVB8BMOQuMMTxe00qdcu17vj1zYMzZh7eh4n+OeNBeFlaXA6Wus YRqL1ktmDHkcKHWDLNDz3daWl8rtCol7adoBk60aHewkgsHGDrVpiXsX1JTnTvzxh0a2M55XeIR GhQ+H3dHGn7S5T7dXtjCzYn82yAorfqlxTmdB1Uprn+M7n7hlS+Oou800u139a0R9wDjzBRnpQp kLOKMWKYEDX3i44rXaiw/FBu1eJBX6JqK+3gnKsBzX7NHGjSeE4VYFtUx0V0JJwzYRusN2tY9kf iDArAXEKVvWZBcBXAogNPfwkTkb2MxGgP2JbhYPmUi7FRD31iOFK1yxGqT2F03Be3Yh+3x04EMm YQ9haXMkqLByQY+1ewDFFDqnIXXapUmNvcaYBD/fCQ4rSFvzDNRskTVKaP8MNtbRXX94YD27wAY UTFJPv7DX7MB3baBA/w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-27_01,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 malwarescore=0 adultscore=0 spamscore=0 bulkscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610270016 On 10/26/2026 11:55 PM, Loic Poulain wrote: > On Sun, Oct 25, 2026 at 4:17 AM Hangxiang Ma > wrote: >> >> Add the three Camera Control Interface (CCI) controllers present on the >> Kaanapali SoC. Each controller provides two I2C hosts used for camera >> sensor control, so define the controller nodes and their pinctrl states. [...]>> @@ -4534,6 +4645,198 @@ tlmm: pinctrl@f100000 { >> #interrupt-cells = <2>; >> wakeup-parent = <&pdc>; >> >> + cci0_i2c0_default: cci0-i2c0-default-state { >> + scl-pins { >> + pins = "gpio110"; >> + function = "cci_i2c_scl"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + sda-pins { >> + pins = "gpio109"; >> + function = "cci_i2c_sda"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + }; >> + >> + cci0_i2c0_sleep: cci0-i2c0-sleep-state { >> + scl-pins { >> + pins = "gpio110"; >> + function = "cci_i2c_scl"; >> + drive-strength = <2>; >> + bias-disable; >> + }; >> + >> + sda-pins { >> + pins = "gpio109"; >> + function = "cci_i2c_sda"; >> + drive-strength = <2>; >> + bias-disable; >> + }; > > Why do we have a sleep state if it's identical to the default/active state? > Do you want gpio with pull instead? > The sleep state is kept so that the CCI suspend path has an explicit pinctrl state to select. As discussed in the v19 thread, SDA and SCL have external pull-up resistors on the board. Therefore, enabling the weak internal pulls is unnecessary. However, I agree that keeping an identical sleep state is redundant. I will change the sleep state to GPIO function with bias disabled, while the external pull-up resistors keep both lines high during suspend. Link: https://lore.kernel.org/all/d30d2b5b-0034-47f0-8e93-9abde4dad118@oss.qualcomm.com/ --- Best regards, Hangxiang