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Wed, 12 Mar 2025 07:11:38 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52C7BbIf008513 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Mar 2025 07:11:37 GMT Received: from [10.217.216.47] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 12 Mar 2025 00:11:31 -0700 Message-ID: Date: Wed, 12 Mar 2025 12:41:28 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/8] clk: qcom: Add support to attach multiple power domains in cc probe To: Bryan O'Donoghue , Vladimir Zapolskiy , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio CC: Ajit Pandey , Imran Shaik , Taniya Das , "Satya Priya Kakitapalli" , , , , , Dmitry Baryshkov References: <20250306-videocc-pll-multi-pd-voting-v2-0-0cd00612bc0e@quicinc.com> <5a45fd25-74ed-46e3-b0e3-5adf92b5e9f7@linaro.org> <46d4f090-3e31-414f-abfc-3d1018913c56@linaro.org> <9e6fdcfe-3c6d-44c7-95a3-7652c0650bf4@linaro.org> Content-Language: en-US From: Jagadeesh Kona In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=HP/DFptv c=1 sm=1 tr=0 ts=67d133aa cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=bU-rbE2s8JpbpfxL7skA:9 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: akoicu-BERqGVOUIAtrrDukoc-ibhcGu X-Proofpoint-GUID: akoicu-BERqGVOUIAtrrDukoc-ibhcGu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-12_02,2025-03-11_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=850 clxscore=1011 priorityscore=1501 adultscore=0 impostorscore=0 malwarescore=0 spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503120046 On 3/11/2025 11:41 PM, Bryan O'Donoghue wrote: > On 11/03/2025 17:55, Vladimir Zapolskiy wrote: >> >> I kindly ask to elaborate here. >> >> This series does not touch CAMCC at all, and if the series touches CAMCC, >> then it changes DT ABI, which is objected. Or is it for some reason >> objected only for SM8550 and not for the other platforms? More information >> is needed. > > No but it _should_ Vlad, that's the ask. > > Both of these clock controllers will require this same change to be implemented, that's what I'm asking Jagadeesh to do. > > Certainly that's the case for x1e and asking Jagadeesh to also check that for sm8650. > Yes, similar changes are required for camcc on SM8450, SM8550, SM8650 and X1E80100. I will add them in the v3 series. For X1E80100 camcc, I see changes are already raised in dt-bindings[1] and DT[2] to add multi PD support, so I will just include the camcc driver change in v3 for X1E80100. [1]: https://lore.kernel.org/all/20250304143152.1799966-1-vladimir.zapolskiy@linaro.org/ [2]: https://lore.kernel.org/all/20250119-b4-linux-next-24-11-18-dtsi-x1e80100-camss-v4-2-c2964504131c@linaro.org/ Thanks, Jagadeesh > --- > bod