From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B5DEC433B4 for ; Wed, 19 May 2021 04:00:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2EA6A610A1 for ; Wed, 19 May 2021 04:00:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230195AbhESECB (ORCPT ); Wed, 19 May 2021 00:02:01 -0400 Received: from mx.socionext.com ([202.248.49.38]:20822 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229379AbhESEB6 (ORCPT ); Wed, 19 May 2021 00:01:58 -0400 Received: from unknown (HELO iyokan2-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 19 May 2021 13:00:38 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan2-ex.css.socionext.com (Postfix) with ESMTP id 64B2620566E0; Wed, 19 May 2021 13:00:38 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Wed, 19 May 2021 13:00:38 +0900 Received: from yuzu2.css.socionext.com (yuzu2 [172.31.9.57]) by iyokan2.css.socionext.com (Postfix) with ESMTP id 21EB5B62A1; Wed, 19 May 2021 13:00:38 +0900 (JST) Received: from [10.212.20.231] (unknown [10.212.20.231]) by yuzu2.css.socionext.com (Postfix) with ESMTP id 5F180B62BA; Wed, 19 May 2021 13:00:37 +0900 (JST) Subject: Re: [PATCH v11 0/3] PCI: uniphier: Add PME/AER support for UniPhier PCIe host controller To: Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , Marc Zyngier Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jassi Brar , Masami Hiramatsu References: <1619111097-10232-1-git-send-email-hayashi.kunihiko@socionext.com> From: Kunihiko Hayashi Message-ID: Date: Wed, 19 May 2021 13:00:37 +0900 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.1 MIME-Version: 1.0 In-Reply-To: <1619111097-10232-1-git-send-email-hayashi.kunihiko@socionext.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Gentle Ping. Are there any comments about this series? Thank you, On 2021/04/23 2:04, Kunihiko Hayashi wrote: > This adds a new function called by MSI handler in DesignWare PCIe framework, > that invokes PME and AER funcions to detect the factor from SoC-dependent > registers. > > Changes since v10: > - Fix comment style in the header > - Fix "virq" and "vIRQ" in variable name and description to "irq" and "IRQ" > > Changes since v9: > - Fix the description of pcie_prot_service_get_irq() > > Changes since v8: > - Add uniphier_pcie_host_init_complete() that finds PME/AER IRQ number > after calling dw_pcie_host_init() > - Add conditions to depend on CONFIG_PCIE_PME and CONFIG_PCIEAER instead > of CONFIG_PCIEPORTBUS > - Add Acked-by: line to portdrv patch > > Changes since v7: > - Add Reviewed-by: line to 1st and 3rd patches > > Changes since v6: > - Separate patches for iATU and phy error from this series > - Add Reviewed-by: line to dwc patch > > Changes since v5: > - Add pcie_port_service_get_irq() function to pcie/portdrv > - Call pcie_port_service_get_irq() to get IRQ interrupt number for PME/AER > - Rebase to the latest linux-next branch, > and remove devm_platform_ioremap_resource_byname() replacement patch > > Changes since v4: > - Add Acked-by: line to dwc patch > > Changes since v3: > - Move msi_host_isr() call into dw_handle_msi_irq() > - Move uniphier_pcie_misc_isr() call into the guard of chained_irq > - Use a bool argument is_msi instead of pci_msi_enabled() > - Consolidate handler calls for the same interrupt > - Fix typos in commit messages > > Changes since v2: > - Avoid printing phy error message in case of EPROBE_DEFER > - Fix iATU register mapping method > - dt-bindings: Add Acked-by: line > - Fix typos in commit messages > - Use devm_platform_ioremap_resource_byname() > > Changes since v1: > - Add check if struct resource is NULL > - Fix warning in the type of dev_err() argument > > Kunihiko Hayashi (3): > PCI: portdrv: Add pcie_port_service_get_irq() function > PCI: dwc: Add msi_host_isr() callback > PCI: uniphier: Add misc interrupt handler to invoke PME and AER > > drivers/pci/controller/dwc/pcie-designware-host.c | 3 + > drivers/pci/controller/dwc/pcie-designware.h | 1 + > drivers/pci/controller/dwc/pcie-uniphier.c | 105 +++++++++++++++++++--- > drivers/pci/pcie/portdrv.h | 1 + > drivers/pci/pcie/portdrv_core.c | 16 ++++ > 5 files changed, 112 insertions(+), 14 deletions(-) > -- --- Best Regards Kunihiko Hayashi