From: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Marijn Suijten <marijn.suijten@somainline.org>,
<phone-devel@vger.kernel.org>
Cc: <~postmarketos/upstreaming@lists.sr.ht>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
Martin Botka <martin.botka@somainline.org>,
Jami Kettunen <jami.kettunen@somainline.org>,
Rob Clark <robdclark@gmail.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>, Vinod Koul <vkoul@kernel.org>,
Douglas Anderson <dianders@chromium.org>,
Vladimir Lypak <vladimir.lypak@gmail.com>,
<linux-arm-msm@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 08/10] drm/msm/dsi: Account for DSC's bits_per_pixel having 4 fractional bits
Date: Wed, 12 Oct 2022 16:25:12 -0700 [thread overview]
Message-ID: <cd860bb3-d2e7-9706-edfc-332f488dfad4@quicinc.com> (raw)
In-Reply-To: <20221009185316.462522-1-marijn.suijten@somainline.org>
On 10/9/2022 11:53 AM, Marijn Suijten wrote:
> drm_dsc_config's bits_per_pixel field holds a fractional value with 4
> bits, which all panel drivers should adhere to for
> drm_dsc_pps_payload_pack() to generate a valid payload. All code in the
> DSI driver here seems to assume that this field doesn't contain any
> fractional bits, hence resulting in the wrong values being computed.
> Since none of the calculations leave any room for fractional bits or
> seem to indicate any possible area of support, disallow such values
> altogether. calculate_rc_params() in intel_vdsc.c performs an identical
> bitshift to get at this integer value.
>
> Fixes: b9080324d6ca ("drm/msm/dsi: add support for dsc data")
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 19 ++++++++++++++-----
> 1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 7e6b7e506ae8..46032c576a59 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -34,7 +34,7 @@
>
> #define DSI_RESET_TOGGLE_DELAY_MS 20
>
> -static int dsi_populate_dsc_params(struct drm_dsc_config *dsc);
> +static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc);
>
> static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor)
> {
> @@ -909,6 +909,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> u32 va_end = va_start + mode->vdisplay;
> u32 hdisplay = mode->hdisplay;
> u32 wc;
> + int ret;
>
> DBG("");
>
> @@ -944,7 +945,9 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> /* we do the calculations for dsc parameters here so that
> * panel can use these parameters
> */
> - dsi_populate_dsc_params(dsc);
> + ret = dsi_populate_dsc_params(msm_host, dsc);
> + if (ret)
> + return;
>
> /* Divide the display by 3 but keep back/font porch and
> * pulse width same
> @@ -1770,9 +1773,15 @@ static char bpg_offset[DSC_NUM_BUF_RANGES] = {
> 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12
> };
>
> -static int dsi_populate_dsc_params(struct drm_dsc_config *dsc)
> +static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc)
> {
> int i;
> + u16 bpp = dsc->bits_per_pixel >> 4;
> +
> + if (dsc->bits_per_pixel & 0xf) {
> + DRM_DEV_ERROR(&msm_host->pdev->dev, "DSI does not support fractional bits_per_pixel\n");
> + return -EINVAL;
> + }
>
> if (dsc->bits_per_component != 8) {
> DRM_DEV_ERROR(&msm_host->pdev->dev, "DSI does not support bits_per_component != 8 yet\n");
> @@ -1798,8 +1807,8 @@ static int dsi_populate_dsc_params(struct drm_dsc_config *dsc)
> dsc->rc_range_params[i].range_bpg_offset = bpg_offset[i];
> }
>
> - dsc->initial_offset = 6144; /* Not bpp 12 */
> - if (dsc->bits_per_pixel != 8)
> + dsc->initial_offset = 6144; /* Not bpp 12 */
> + if (bpp != 8)
> dsc->initial_offset = 2048; /* bpp = 12 */
>
> if (dsc->bits_per_component <= 10)
next prev parent reply other threads:[~2022-10-12 23:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-09 18:48 [PATCH v3 00/10] drm/msm: Fix math issues in MSM DSC implementation Marijn Suijten
2022-10-09 18:48 ` [PATCH v3 01/10] drm/msm/dsi: Remove useless math in DSC calculations Marijn Suijten
2022-10-09 18:52 ` Dmitry Baryshkov
2022-10-09 18:48 ` [PATCH v3 02/10] drm/msm/dsi: Remove repeated calculation of slice_per_intf Marijn Suijten
2022-10-09 18:53 ` Dmitry Baryshkov
2022-10-09 18:48 ` [PATCH v3 03/10] drm/msm/dsi: Use DIV_ROUND_UP instead of conditional increment on modulo Marijn Suijten
2022-10-09 18:53 ` Dmitry Baryshkov
2022-10-09 18:48 ` [PATCH v3 04/10] drm/msm/dsi: Reuse earlier computed dsc->slice_chunk_size Marijn Suijten
2022-10-09 18:54 ` Dmitry Baryshkov
2022-10-09 18:48 ` [PATCH v3 05/10] drm/msm/dsi: Appropriately set dsc->mux_word_size based on bpc Marijn Suijten
2022-10-09 18:55 ` Dmitry Baryshkov
2022-10-12 22:53 ` Abhinav Kumar
2022-10-09 18:48 ` [PATCH v3 06/10] drm/msm/dsi: Migrate to drm_dsc_compute_rc_parameters() Marijn Suijten
2022-10-09 18:56 ` Dmitry Baryshkov
2022-10-09 18:50 ` Marijn Suijten
2022-10-09 18:58 ` Marijn Suijten
2022-10-12 23:03 ` [Freedreno] " Abhinav Kumar
2022-10-13 9:36 ` Marijn Suijten
2022-10-13 16:02 ` Abhinav Kumar
2022-10-17 8:59 ` Marijn Suijten
2022-10-17 13:37 ` Caleb Connolly
2022-10-17 16:28 ` Abhinav Kumar
2022-10-09 18:51 ` [PATCH v3 07/10] drm/msm/dsi: Disallow 8 BPC DSC configuration for alternative BPC values Marijn Suijten
2022-10-09 18:57 ` Dmitry Baryshkov
2022-10-09 23:53 ` kernel test robot
2022-10-12 23:08 ` Abhinav Kumar
2022-10-13 9:27 ` Marijn Suijten
2022-10-09 18:53 ` [PATCH v3 08/10] drm/msm/dsi: Account for DSC's bits_per_pixel having 4 fractional bits Marijn Suijten
2022-10-09 19:24 ` Dmitry Baryshkov
2022-10-12 23:25 ` Abhinav Kumar [this message]
2022-10-09 18:53 ` [PATCH v3 09/10] drm/msm/dpu1: " Marijn Suijten
2022-10-09 18:53 ` [PATCH v3 10/10] drm/msm/dsi: Prevent signed BPG offsets from bleeding into adjacent bits Marijn Suijten
2022-10-09 19:14 ` Dmitry Baryshkov
2022-10-11 7:51 ` Marijn Suijten
2022-10-12 23:26 ` Abhinav Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cd860bb3-d2e7-9706-edfc-332f488dfad4@quicinc.com \
--to=quic_abhinavk@quicinc.com \
--cc=airlied@gmail.com \
--cc=angelogioacchino.delregno@somainline.org \
--cc=daniel@ffwll.ch \
--cc=dianders@chromium.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=freedreno@lists.freedesktop.org \
--cc=jami.kettunen@somainline.org \
--cc=konrad.dybcio@somainline.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marijn.suijten@somainline.org \
--cc=martin.botka@somainline.org \
--cc=phone-devel@vger.kernel.org \
--cc=robdclark@gmail.com \
--cc=sean@poorly.run \
--cc=vkoul@kernel.org \
--cc=vladimir.lypak@gmail.com \
--cc=~postmarketos/upstreaming@lists.sr.ht \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®