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Fri, 16 Aug 2019 13:42:38 +0200 Subject: Re: [PATCH 1/2] dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL devicetree bindings To: Rob Herring Cc: "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Mark Rutland , Shawn Guo , Sascha Hauer , "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, Fabio Estevam , Andrew Smirnov , Manivannan Sadhasivam , NXP Linux Team References: <1563954573-370205-1-git-send-email-s.riedmueller@phytec.de> <20190813160448.GA27548@bogus> <073f9466-9dd3-a22c-e000-e9f4c60f90a0@phytec.de> From: =?UTF-8?Q?Stefan_Riedm=c3=bcller?= Message-ID: Date: Fri, 16 Aug 2019 13:42:38 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 16.08.2019 13:42:38, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 16.08.2019 13:42:38 X-TNEFEvaluated: 1 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42JZI8DApbtuWlisQdN/SYvmDluL+UfOsVo8 vOpvsenxNVaLrl8rmS0u75rDZnG3pZPVYun1i0wW//fsYLf4u30Ti8WLLeIO3B5r5q1h9Ng5 6y67x6ZVnWwed67tYfPYvKTeY+O7HUwe/X8NPD5vkgvgiOKySUnNySxLLdK3S+DKaHr7kLlg jljFj/ONbA2MTwS7GDk5JARMJG5fncbYxcjFISSwg1GibfEJJgjnNKPEnVWvWUGqhAViJd6t ns8CYosIKEr8bpvGClLELHCTWeLVjYUsEB2PGSVWLPnGBlLFJuAksfh8B5jNK2AjMe/qHPYu Rg4OFgFViQVrpUHCogIREod3zGKEKBGUODnzCdgCToFAiZUPN7CDzJQQuMIoMbHxOjvErUIS pxefZQaxmQXMJOZtfghli0vcejKfCcLWlli28DXzBEahWUjmzkLSMgtJyywkLQsYWVYxCuVm JmenFmVm6xVkVJakJuulpG5iBEba4Ynql3Yw9s3xOMTIxMF4iFGCg1lJhHfCxaBYId6UxMqq 1KL8+KLSnNTiQ4zSHCxK4rwbeEvChATSE0tSs1NTC1KLYLJMHJxSDYx+CleDXolscDXwuFKq UTYr29xLafaEU6w9xfO8J9t79XExO/xj9Qr2nsbaeNuJJzf+X5915G6DO457Lb2+r0x0inWa LPpFatfEA6k6PWc9td9M3qwl+dr4uZf+Qp0fjBXf3suueS6+/vYs+/n1ixLnTBdeas390XK1 vXXURsuPQmvW35r8q1yJpTgj0VCLuag4EQBQuJqjogIAAA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On 15.08.19 15:43, Rob Herring wrote: > On Thu, Aug 15, 2019 at 4:55 AM Stefan Riedm=C3=BCller > wrote: >> >> Hi Rob, >> >> On 13.08.19 18:04, Rob Herring wrote: >>> On Wed, Jul 24, 2019 at 09:49:32AM +0200, Stefan Riedmueller wrote: >>>> Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and >>>> phyBOARD-Segin. >>>> >>>> Signed-off-by: Stefan Riedmueller >>>> --- >>>> Documentation/devicetree/bindings/arm/fsl.yaml | 8 ++++++++ >>>> 1 file changed, 8 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Document= ation/devicetree/bindings/arm/fsl.yaml >>>> index 7294ac36f4c0..40f007859092 100644 >>>> --- a/Documentation/devicetree/bindings/arm/fsl.yaml >>>> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml >>>> @@ -161,12 +161,20 @@ properties: >>>> items: >>>> - enum: >>>> - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 E= VK Board >>>> + - phytec,imx6ul-pbacd10 # PHYTEC phyBOARD-Segin wit= h i.MX6 UL >>>> + - phytec,imx6ul-pbacd10-emmc # PHYTEC phyBOARD-Segin e= MMC Kit >>>> + - phytec,imx6ul-pbacd10-nand # PHYTEC phyBOARD-Segin N= AND Kit >>>> + - phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL >>> >>> This doesn't match what is in the dts files: >>> >>> arch/arm/boot/dts/imx6ul-phytec-pcl063.dtsi: compatible =3D "phytec,= imx6ul-pcl063", "fsl,imx6ul"; >>> arch/arm/boot/dts/imx6ul-phytec-phyboard-segin-full.dts: compatibl= e =3D "phytec,imx6ul-pbacd10", "phytec,imx6ul-pcl063", >>> "fsl,imx6ul"; >>> arch/arm/boot/dts/imx6ul-phytec-phyboard-segin.dtsi: compatible =3D = "phytec,imx6ul-pbacd-10", "phytec,imx6ul-pcl063", >>> "fsl,imx6ul"; >> >> Shawn already applied my patches which rename the compatibles, see >> https://lkml.org/lkml/2019/7/23/42 >=20 > In any case, it still doesn't match. For example, from those patches: >=20 > + model =3D "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC"; > + compatible =3D "phytec,imx6ull-pbacd10-emmc", "phytec,imx6ull-pbacd10", > + "phytec,imx6ull-pcl063","fsl,imx6ull"; >=20 > The correct schema for this would be: >=20 > items: > - const: phytec,imx6ull-pbacd10-emmc > - const: phytec,imx6ull-pbacd10 > - const: phytec,imx6ull-pcl063 > - const: fsl,imx6ull >=20 > This defines how many entries (4), what they are, and the order of > them. Maybe the first entry can be an enum with the -nand compatible > if those are 2 options. >=20 > Run 'make dtbs=5Fcheck' and make sure there aren't warnings for the root = node. Thanks for your input. I will take another closer look at this and send a=20 new version. Stefan >=20 > Rob >=20