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From: Xukai Wang <kingxukai@zohomail.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Conor Dooley <conor+dt@kernel.org>,
	Conor Dooley <conor@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh@kernel.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Samuel Holland <samuel.holland@sifive.com>,
	Troy Mitchell <TroyMitchell988@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH v6 0/3] riscv: canaan: Add support for K230-Canmv clock
Date: Sat, 26 Jul 2025 13:22:46 +0800	[thread overview]
Message-ID: <cde19d45-fbd6-4b8c-b04f-e34811d62ae8@zohomail.com> (raw)
In-Reply-To: <175339519523.3513.2798631977806639092@lazor>


On 2025/7/25 06:13, Stephen Boyd wrote:
> Quoting Xukai Wang (2025-07-13 09:48:44)
>> I'm working on a Linux clock driver and have encountered a question
>> regarding how to properly represent a particular type of clock source.
>>
>> In K230 SoC, there's a mux clock whose parent can optionally be an
>> external pulse signal, which is counted via a pin (the input is not
>> generated internally but comes from an external source). I’m wondering:
>>
>> Should this external pulse signal be modeled as a clock within the
>> Common Clock Framework (CCF)?
> Likely, yes.
>
>> If so, what would be the correct way to register or describe such a
>> clock in the driver?
> If it is a fixed rate pulse signal I would use a fixed rate clk node at
> the root of the DT tree:
>
> 	clock-50000 {
> 		compatible = "fixed-clock";
> 		#clock-cells = <0>;
> 		clock-frequency = <50000>;
> 	}
>
> If you need pinctrl settings to make that clk work you can assign them
> in that node, although I don't know if I've ever seen such a case
> before. 
Thanks for your reply and helpful explanation!

Regarding the timer-pulse-in, the documentation describes it as:

"can be used to count external input signal with frequency less than
1MHz and duty cycle from 0~100%"

So the input frequency is not fixed in practice.

Given that, modeling it as a fixed-rate clock might not be accurate.

And I'm considering whether a more feature-rich driver is needed to
handle the dynamically changing external clock, or if there's a better
way to describe such a clock in the CCF.

> If the external parent clk needs to be gated you'll need to
> write a more featured driver, unless it can be controlled with a gpio or
> something like that.
and I think it doesn't need to be gated.

      reply	other threads:[~2025-07-26  5:23 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-15 14:25 Xukai Wang
2025-04-15 14:25 ` [PATCH v6 1/3] dt-bindings: clock: Add bindings for Canaan K230 clock controller Xukai Wang
2025-04-21 10:47   ` Chen Wang
2025-04-22  4:18     ` Xukai Wang
2025-04-15 14:25 ` [PATCH v6 2/3] clk: canaan: Add clock driver for Canaan K230 Xukai Wang
2025-04-18 12:31   ` Troy Mitchell
2025-04-18 14:19     ` Xukai Wang
2025-04-19 10:42     ` Xukai Wang
2025-04-19 11:00       ` Troy Mitchell
2025-04-20 18:08   ` PATCH " ALOK TIWARI
2025-04-21 10:47     ` Xukai Wang
2025-04-21 10:43   ` [PATCH " Chen Wang
2025-04-22  8:01     ` Xukai Wang
2025-04-29 13:12       ` Troy Mitchell
2025-04-15 14:25 ` [PATCH v6 3/3] riscv: dts: canaan: Add clock definition for K230 Xukai Wang
2025-07-13 16:48 ` [PATCH v6 0/3] riscv: canaan: Add support for K230-Canmv clock Xukai Wang
2025-07-24 22:13   ` Stephen Boyd
2025-07-26  5:22     ` Xukai Wang [this message]

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