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Sat, 08 Feb 2025 00:42:49 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 5180gmHl008244 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 8 Feb 2025 00:42:48 GMT Received: from [10.110.94.204] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 7 Feb 2025 16:42:47 -0800 Message-ID: Date: Fri, 7 Feb 2025 16:42:46 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/7] drm/msm/hdmi: program HDMI timings during atomic_pre_enable To: Dmitry Baryshkov , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Rob Clark , Sean Paul , Marijn Suijten , Simona Vetter , Simona Vetter CC: , , , References: <20250208-bridge-hdmi-connector-v7-0-0c3837f00258@linaro.org> <20250208-bridge-hdmi-connector-v7-2-0c3837f00258@linaro.org> Content-Language: en-US From: Abhinav Kumar In-Reply-To: <20250208-bridge-hdmi-connector-v7-2-0c3837f00258@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: RHTzmRBfGq36tSuCNDeI_LPDsup84izJ X-Proofpoint-ORIG-GUID: RHTzmRBfGq36tSuCNDeI_LPDsup84izJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-07_11,2025-02-07_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 spamscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 impostorscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502080002 On 2/7/2025 4:27 PM, Dmitry Baryshkov wrote: > The mode_set callback is deprecated, it doesn't get the > drm_bridge_state, just mode-related argumetns. Also Abhinav pointed out > that HDMI timings should be programmed after setting up HDMI PHY and > PLL. Rework the code to program HDMI timings at the end of > atomic_pre_enable(). > I think now this needs to be changed that, program the HDMI timings at the beginning of atomic_pre_enable() to match the location of mode_set() With that fixed, Reviewed-by: Abhinav Kumar > Reviewed-by: Maxime Ripard > Signed-off-by: Dmitry Baryshkov > --- > drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 24 ++++++++++++++++-------- > 1 file changed, 16 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > index d839c71091dcdc3b020fcbba8d698d58ee7fc749..bd94b3a70f0e5e457a88f089b491103a8c09567b 100644 > --- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > +++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c > @@ -126,15 +126,29 @@ static void msm_hdmi_config_avi_infoframe(struct hdmi *hdmi) > hdmi_write(hdmi, REG_HDMI_INFOFRAME_CTRL1, val); > } > > +static void msm_hdmi_set_timings(struct hdmi *hdmi, > + const struct drm_display_mode *mode); > + > static void msm_hdmi_bridge_atomic_pre_enable(struct drm_bridge *bridge, > struct drm_bridge_state *old_bridge_state) > { > + struct drm_atomic_state *state = old_bridge_state->base.state; > struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); > struct hdmi *hdmi = hdmi_bridge->hdmi; > struct hdmi_phy *phy = hdmi->phy; > + struct drm_encoder *encoder = bridge->encoder; > + struct drm_connector *connector; > + struct drm_connector_state *conn_state; > + struct drm_crtc_state *crtc_state; > > DBG("power up"); > > + connector = drm_atomic_get_new_connector_for_encoder(state, encoder); > + conn_state = drm_atomic_get_new_connector_state(state, connector); > + crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); > + > + msm_hdmi_set_timings(hdmi, &crtc_state->adjusted_mode); > + > if (!hdmi->power_on) { > msm_hdmi_phy_resource_enable(phy); > msm_hdmi_power_on(bridge); > @@ -177,17 +191,12 @@ static void msm_hdmi_bridge_atomic_post_disable(struct drm_bridge *bridge, > } > } > > -static void msm_hdmi_bridge_mode_set(struct drm_bridge *bridge, > - const struct drm_display_mode *mode, > - const struct drm_display_mode *adjusted_mode) > +static void msm_hdmi_set_timings(struct hdmi *hdmi, > + const struct drm_display_mode *mode) > { > - struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge); > - struct hdmi *hdmi = hdmi_bridge->hdmi; > int hstart, hend, vstart, vend; > uint32_t frame_ctrl; > > - mode = adjusted_mode; > - > hdmi->pixclock = mode->clock * 1000; > > hstart = mode->htotal - mode->hsync_start; > @@ -306,7 +315,6 @@ static const struct drm_bridge_funcs msm_hdmi_bridge_funcs = { > .atomic_reset = drm_atomic_helper_bridge_reset, > .atomic_pre_enable = msm_hdmi_bridge_atomic_pre_enable, > .atomic_post_disable = msm_hdmi_bridge_atomic_post_disable, > - .mode_set = msm_hdmi_bridge_mode_set, > .mode_valid = msm_hdmi_bridge_mode_valid, > .edid_read = msm_hdmi_bridge_edid_read, > .detect = msm_hdmi_bridge_detect, >