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client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by BL02EPF0001A103.mail.protection.outlook.com (10.167.241.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.406.5 via Frontend Transport; Tue, 8 Sep 2026 19:41:00 +0000 Received: from satlexmb07.amd.com (10.181.42.216) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Tue, 8 Sep 2026 14:41:00 -0500 Received: from [192.168.0.226] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.46 via Frontend Transport; Tue, 8 Sep 2026 14:40:55 -0500 Message-ID: Date: Wed, 9 Sep 2026 01:10:48 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection To: Andrea Righi , Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Catalin Marinas , Will Deacon CC: Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Mark Rutland , Christian Loehle , Shrikanth Hegde , Phil Auld , Breno Leitao , , References: <20260908082345.103087-1-arighi@nvidia.com> <20260908082345.103087-3-arighi@nvidia.com> Content-Language: en-US From: K Prateek Nayak In-Reply-To: <20260908082345.103087-3-arighi@nvidia.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: FCKUwsDLXbyPEl5gZA/0HhM4mpEMbT7SeC6cx5PgRYf7DlVEHx2YFAGqn15pG4pDu+gdEIVKF3mSqfa5pUwFuvbWnIsCVnVXzEg/hAIYItSTR6rlFWopDS0iaA1Oom+Mj3YKY4RKpkkUF7J6EAi5ekiZL95/fizNYqXsybe4ec8S++7QodW3TXmhKLUFUpPN/eVvyvL6ozUxIFtYicKc8y2pQuZgnjqOXqhuPh+MTHehCsUFkkjfQmllCwf2PpyVTJB2q7TfUDjkcx9Tz4XPN8lNw5eZ98KbJEeSaWAxb7+UpzpFBoZJ/IGcYKqog1Um673ozhojB4SMPmuiOlF8PLQbgRaZTSdtDlUiDK67OwSsKRrZCE3J83+zYFWWnfS6G8DjE04+ox4/HlwUbKmTzmueuFiJ7pNr3KQSpi6hsUvK3oML6zoOb4JdY3wr4Jh7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2026 19:41:00.5977 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da63638c-4683-46e8-4636-08df0de11c79 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A103.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7810 Hello Andrea, On 9/8/2026 1:53 PM, Andrea Righi wrote: > @@ -9747,8 +9796,10 @@ select_task_rq_fair(struct task_struct *p, int prev_cpu, int wake_flags) > } > > /* Slow path */ > - if (unlikely(sd)) > - return sched_balance_find_dst_cpu(sd, p, cpu, prev_cpu, sd_flag); > + if (unlikely(sd)) { > + new_cpu = sched_balance_find_dst_cpu(sd, p, cpu, prev_cpu, sd_flag); > + return select_idle_smt_cpu(p, new_cpu); nit. I personally feel this can be better integrated into the sched_balance_find_dst_cpu(). Something like the following: (Only build tested) diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index b8bd308c2d5b..1012dfb33f08 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -12353,6 +12353,17 @@ static inline void update_sg_wakeup_stats(struct sched_domain *sd, } + /* + * If we are on a SD_SHARE_CPUCAPACITY | SD_ASYM_PACKING + * domain, use the group_asym_packing classification to + * decide placement based on rankings of idle siblings. + */ + if (unlikely(sched_smt_asym_active() && + (sd->flags & SD_SHARE_CPUCAPACITY) && + (sd->flags & SD_ASYM_PACKING) && + sgs->idle_cpus)) + sgs->group_asym_packing = 1; + sgs->group_capacity = group->sgc->capacity; sgs->group_weight = group->group_weight; @@ -12393,9 +12404,15 @@ static bool update_pick_idlest(struct sched_group *idlest, return false; break; + case group_asym_packing: + /* + * Only possible for sched_smt_asym_active(). + * Select the idle SMT that is more preferred. + */ + return sched_asym_prefer(idlest->asym_prefer_cpu, + group->asym_prefer_cpu); case group_llc_balance: case group_imbalanced: - case group_asym_packing: case group_smt_balance: /* Those types are not used in the slow wakeup path */ return false; --- It leads to slightly more branches but they are super predictable when iterating at a particular sched_domain level so the overhead should be negligible. I don't have any strong feelings either ways. Thoughts? -- Thanks and Regards, Prateek