From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B59712AD3E for ; Tue, 19 Aug 2025 03:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755575211; cv=none; b=ftffQxkiognrUnZRkDFgQPpPZzsLBGyRE6e3Hwhtt2HXdQUFawzFWxkTtSqhTVfUvyLyqxkUZozRQRJmdSXiSBUaZx/hVJuq2Mn7YJLvlAIgv0mOUNdU/As/RSndMN2B8hb9JozyEpIhv0JLUpyVqzZauFPIaK1cyrd0OtiTR1g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755575211; c=relaxed/simple; bh=CybrX/I+Sfq+4vxNl4rvUqohj08LbqK4g97JTJwIutE=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=jVSTwUo9N59cAXeqDICy96kh8Z1bXBqQEoyDOXr1FRYw8QuSnhMZIr0rLUKn19Sf5qhuEWPD0j3YGvgwsWCi/s0Ja7FrjqA8nxV+9J3e44x1tiYqg70vuaI4S7c6Mg2Z5g0tPbrnNNRw8ksVEGth2AAAXdmIl6qyXmZJRxsqvnU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E2266152B; Mon, 18 Aug 2025 20:46:40 -0700 (PDT) Received: from [10.164.146.16] (J09HK2D2RT.blr.arm.com [10.164.146.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CC97F3F58B; Mon, 18 Aug 2025 20:46:45 -0700 (PDT) Message-ID: Date: Tue, 19 Aug 2025 09:16:42 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64/sysreg: Add TCR_EL2 register To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Mark Brown , Ryan Roberts , kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org References: <20250818045759.672408-1-anshuman.khandual@arm.com> <20250818045759.672408-4-anshuman.khandual@arm.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 18/08/25 2:47 PM, Mark Rutland wrote: > On Mon, Aug 18, 2025 at 10:27:58AM +0530, Anshuman Khandual wrote: >> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg >> index 4bdae8bb11dc..d2b40105eb41 100644 >> --- a/arch/arm64/tools/sysreg >> +++ b/arch/arm64/tools/sysreg >> @@ -4812,6 +4812,50 @@ Sysreg TCR_EL12 3 5 2 0 2 >> Mapping TCR_EL1 >> EndSysreg >> >> +Sysreg TCR_EL2 3 4 2 0 2 >> +Res0 63:34 >> +Field 33 MTX >> +Field 32 DS >> +Res1 31 >> +Field 30 TCMA >> +Field 29 TBID >> +Field 28 HWU62 >> +Field 27 HWU61 >> +Field 26 HWU60 >> +Field 25 HWU59 >> +Field 24 HPD >> +Res1 23 >> +Field 22 HD >> +Field 21 HA >> +Field 20 TBI >> +Res0 19 >> +Field 18:16 PS >> +UnsignedEnum 15:14 TG0 >> + 0b00 4K >> + 0b01 64K >> + 0b10 16K >> +EndEnum > > Same comment as for patch 1: this is not ordered, use Enum rather than > UnsignedEnum. Likewise for the other cases below. Sure, will change. > > Mark. > >> +UnsignedEnum 13:12 SH0 >> + 0b00 NONE >> + 0b10 OUTER >> + 0b11 INNER >> +EndEnum >> +UnsignedEnum 11:10 ORGN0 >> + 0b00 NC >> + 0b01 WBWA >> + 0b10 WT >> + 0b11 WBnWA >> +EndEnum >> +UnsignedEnum 9:8 IRGN0 >> + 0b00 NC >> + 0b01 WBWA >> + 0b10 WT >> + 0b11 WBnWA >> +EndEnum >> +Res0 7:6 >> +Field 5:0 T0SZ >> +EndSysreg >> + >> Sysreg TCRALIAS_EL1 3 0 2 7 6 >> Mapping TCR_EL1 >> EndSysreg >> -- >> 2.25.1 >> >>