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([2a01:e0a:982:cbb0:ac4e:a5fe:7f71:8d59]) by smtp.gmail.com with ESMTPSA id o4-20020a5d58c4000000b0033333bee379sm13767115wrf.107.2023.12.13.08.45.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Dec 2023 08:45:33 -0800 (PST) Message-ID: Date: Wed, 13 Dec 2023 17:45:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] arm64: dts: qcom: sm8450: move Soundwire pinctrl to its nodes Content-Language: en-GB To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20231213162856.188566-1-krzysztof.kozlowski@linaro.org> <20231213162856.188566-2-krzysztof.kozlowski@linaro.org> From: Neil Armstrong In-Reply-To: <20231213162856.188566-2-krzysztof.kozlowski@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 13/12/2023 à 17:28, Krzysztof Kozlowski a écrit : > Pin configuration for Soundwire bus should be set in Soundwire > controller nodes, not in the associated macro codec node. This > placement change should not have big impact in general, because macro > codec is a clock provider for Soundwire controller, thus its devices is > probed first. However it will have impact for disabled Soundwire buses, > e.g. WSA2, because after this change the pins will be left in default > state. > > We also follow similar approach in newer SoCs, like Qualcomm SM8650. > > Signed-off-by: Krzysztof Kozlowski > > --- > > Not tested on HW. > --- > arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 ++++++++++++-------- > 1 file changed, 12 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi > index 12e55a0c7417..3b6ea9653d2a 100644 > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi > @@ -2160,8 +2160,6 @@ wsa2macro: codec@31e0000 { > > #clock-cells = <0>; > clock-output-names = "wsa2-mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&wsa2_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2173,6 +2171,9 @@ swr4: soundwire-controller@31f0000 { > clock-names = "iface"; > label = "WSA2"; > > + pinctrl-0 = <&wsa2_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <2>; > qcom,dout-ports = <6>; > > @@ -2208,8 +2209,6 @@ rxmacro: codec@3200000 { > > #clock-cells = <0>; > clock-output-names = "mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&rx_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2223,6 +2222,9 @@ swr1: soundwire-controller@3210000 { > qcom,din-ports = <0>; > qcom,dout-ports = <5>; > > + pinctrl-0 = <&rx_swr_active>; > + pinctrl-names = "default"; > + > qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; > qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>; > qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; > @@ -2254,8 +2256,6 @@ txmacro: codec@3220000 { > > #clock-cells = <0>; > clock-output-names = "mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&tx_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2275,8 +2275,6 @@ wsamacro: codec@3240000 { > > #clock-cells = <0>; > clock-output-names = "mclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&wsa_swr_active>; > #sound-dai-cells = <1>; > }; > > @@ -2288,6 +2286,9 @@ swr0: soundwire-controller@3250000 { > clock-names = "iface"; > label = "WSA"; > > + pinctrl-0 = <&wsa_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <2>; > qcom,dout-ports = <6>; > > @@ -2318,6 +2319,9 @@ swr2: soundwire-controller@33b0000 { > clock-names = "iface"; > label = "TX"; > > + pinctrl-0 = <&tx_swr_active>; > + pinctrl-names = "default"; > + > qcom,din-ports = <4>; > qcom,dout-ports = <0>; > qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>; Reviewed-by: Neil Armstrong