From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10C8BC19F29 for ; Thu, 4 Aug 2022 00:18:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240310AbiHDASs (ORCPT ); Wed, 3 Aug 2022 20:18:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239263AbiHDASm (ORCPT ); Wed, 3 Aug 2022 20:18:42 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D49995F10C; Wed, 3 Aug 2022 17:18:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1659572318; x=1691108318; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=i99TJo8RbVnlx7Q6fpfJKMDoIMtmjkVLJodpurQRRV4=; b=XlCA0K9dU8zRDgkOsTQEq8Ur+RrF3/jBbmX7a9beiPsA0FlKNqcldf3A LrPXrEjz1oY1Mjb/KM2Qa3E/Y70d65hQ3FYJUzgWw38rMfrDkEvGXQQYM kRIuisMl8nmFwwAjpicgeO3zgBYDgWJAOO9N3HnV+l/zguNP99uNlhmIS 4=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 03 Aug 2022 17:18:38 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2022 17:18:39 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 3 Aug 2022 17:18:38 -0700 Received: from [10.38.247.209] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 3 Aug 2022 17:18:34 -0700 Message-ID: Date: Wed, 3 Aug 2022 17:18:32 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [PATCH v3 4/6] drm/msm/dsi: Use the new regulator bulk feature to specify the load Content-Language: en-US To: Douglas Anderson , Rob Clark , Dmitry Baryshkov CC: , Mark Brown , , , "Daniel Vetter" , David Airlie , Jonathan Marek , Rajeev Nandan , Sean Paul , Stephen Boyd , Vinod Koul , References: <20220802223738.898592-1-dianders@chromium.org> <20220802153434.v3.4.I7b3c72949883846badb073cfeae985c55239da1d@changeid> From: Abhinav Kumar In-Reply-To: <20220802153434.v3.4.I7b3c72949883846badb073cfeae985c55239da1d@changeid> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8/2/2022 3:37 PM, Douglas Anderson wrote: > As of commit 6eabfc018e8d ("regulator: core: Allow specifying an > initial load w/ the bulk API") we can now specify the initial load in > the bulk data rather than having to manually call regulator_set_load() > on each regulator. Let's use it. > > Signed-off-by: Douglas Anderson Reviewed-by: Abhinav Kumar > --- > > Changes in v3: > - Update commit message to point at the git hash of the regulator change. > > Changes in v2: > - ("Use the new regulator bulk feature to specify the load") new for v2. > > drivers/gpu/drm/msm/dsi/dsi_host.c | 13 +++---------- > drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 13 +++---------- > 2 files changed, 6 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index 9df278d39559..a0a1b6d61d05 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -260,8 +260,10 @@ static int dsi_regulator_init(struct msm_dsi_host *msm_host) > int num = msm_host->cfg_hnd->cfg->reg_cfg.num; > int i, ret; > > - for (i = 0; i < num; i++) > + for (i = 0; i < num; i++) { > s[i].supply = regs[i].name; > + s[i].init_load_uA = regs[i].enable_load; > + } > > ret = devm_regulator_bulk_get(&msm_host->pdev->dev, num, s); > if (ret < 0) { > @@ -270,15 +272,6 @@ static int dsi_regulator_init(struct msm_dsi_host *msm_host) > return ret; > } > > - for (i = 0; i < num; i++) { > - if (regs[i].enable_load >= 0) { > - ret = regulator_set_load(s[i].consumer, > - regs[i].enable_load); > - if (ret < 0) > - return ret; > - } > - } > - > return 0; > } > > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > index 7c105120d73e..efb6b1726cdb 100644 > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c > @@ -515,8 +515,10 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy *phy) > int num = phy->cfg->reg_cfg.num; > int i, ret; > > - for (i = 0; i < num; i++) > + for (i = 0; i < num; i++) { > s[i].supply = regs[i].name; > + s[i].init_load_uA = regs[i].enable_load; > + } > > ret = devm_regulator_bulk_get(dev, num, s); > if (ret < 0) { > @@ -529,15 +531,6 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy *phy) > return ret; > } > > - for (i = 0; i < num; i++) { > - if (regs[i].enable_load >= 0) { > - ret = regulator_set_load(s[i].consumer, > - regs[i].enable_load); > - if (ret < 0) > - return ret; > - } > - } > - > return 0; > } >