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Tue, 13 Oct 2026 13:29:03 -0500 Message-ID: Date: Tue, 13 Oct 2026 11:29:08 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH V4 09/19] accel/amdxdna: Add context switch hysteresis with debugfs control Content-Language: en-US To: David Zhang , , , , , , CC: , , Nishad Saraf References: <20261009225343.3079074-1-yidong.zhang@amd.com> <20261009225343.3079074-10-yidong.zhang@amd.com> From: Lizhi Hou In-Reply-To: <20261009225343.3079074-10-yidong.zhang@amd.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL2PEPF000352D5:EE_|MN0PR12MB5835:EE_ X-MS-Office365-Filtering-Correlation-Id: 90313b4d-e1d6-4de8-04a8-08df2957e007 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|1800799024|23010399003|6133799003|10067099003|22082099003|18002099003|4143699003|11063799006|261009223027099003|56012099006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: xU+RSusBX2Kmay1UfzgqxevgHM0vqsi8bB5Ev98ttQpUhg3MNUwmRb0YRNiYAnFZCU+pR+UjGnRz5wNL/mDn4PcOiyoJQlTdFwAF7nao727vs8u8ob/OCS1yKY1yuRcxgHaZxLcYdJ9wFsJaV4ookFrRCZQHnv/UBSrbxpDucyWw1jN+c9ASEyqFEhovaNxYR/8ZaF8sAK9isxVm0E0t5RWoAg1/hNaFLk5smYLzpz0PMLIyI9uNNVgmDodDMPVEEEXZaZFGmyD6/yY+vA3sRXt5wkd6yQB3TyelTiY8CaegF9CyeL1F+iqBhmAk8Fp8ru7IHta+A8mCAzM6TafiJSKUVo7MF6lj0OZ/9NQa0ehQcb0FlyykPyb0Q9ZLGqrul2Fp67KErkhIQzicqkM3HGAtdEPA1VqHfUMS1QkOIAu+NDBhWghMxiU+eLeIN/gm X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2026 18:29:10.6905 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 90313b4d-e1d6-4de8-04a8-08df2957e007 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL2PEPF000352D5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5835 On 10/9/26 15:53, David Zhang wrote: > Add aie4_set_ctx_hysteresis() to configure the AIE4 context switch > hysteresis timeout via the SET_RUNTIME_CONFIG message, applied at hw > start (PF and classic paths) with a default of 1000 us. > > Expose a debugfs node 'ctx_switch_hysteresis_us' to change the timeout > at runtime (0 disables hysteresis). The stored value is re-applied on > every hw start so it survives runtime suspend/resume. > > Co-developed-by: Nishad Saraf > Signed-off-by: Nishad Saraf > Signed-off-by: David Zhang > --- > drivers/accel/amdxdna/aie4_message.c | 43 +++++++++++++ > drivers/accel/amdxdna/aie4_msg_priv.h | 24 +++++++ > drivers/accel/amdxdna/aie4_pci.c | 83 ++++++++++++++++++++++++- > drivers/accel/amdxdna/aie4_pci.h | 9 +++ > drivers/accel/amdxdna/amdxdna_debugfs.c | 3 + > drivers/accel/amdxdna/amdxdna_pci_drv.h | 1 + > 6 files changed, 161 insertions(+), 2 deletions(-) > > diff --git a/drivers/accel/amdxdna/aie4_message.c b/drivers/accel/amdxdna/aie4_message.c > index 263e23aff69f..2820cfb6f9ed 100644 > --- a/drivers/accel/amdxdna/aie4_message.c > +++ b/drivers/accel/amdxdna/aie4_message.c > @@ -263,3 +263,46 @@ int aie4_msg_set_power_mode(struct amdxdna_dev_hdl *ndev, u8 power_mode) > > return ret; > } > + > +int aie4_set_runtime_cfg(struct amdxdna_dev_hdl *ndev, u32 type, > + const void *data, size_t size) > +{ > + DECLARE_AIE_MSG(aie4_msg_set_runtime_cfg, AIE4_MSG_OP_SET_RUNTIME_CONFIG); > + u8 buf[sizeof(req.type) + AIE4_RUNTIME_CFG_MAX_DATA_SIZE] __aligned(4) = { 0 }; > + int ret; > + > + if (size > AIE4_RUNTIME_CFG_MAX_DATA_SIZE) > + return -EINVAL; > + > + /* Stage runtime config type and payload for firmware mailbox message. */ > + req.type = type; > + memcpy(buf, &req.type, sizeof(req.type)); > + memcpy(buf + sizeof(req.type), data, size); > + > + msg.send_data = buf; > + msg.send_size = sizeof(req.type) + size; > + > + ret = aie_send_mgmt_msg_wait(&ndev->aie, &msg); > + if (ret) > + XDNA_ERR(ndev->aie.xdna, "Failed to set runtime cfg %u: %d", type, ret); > + return ret; > +} > + > +int aie4_set_ctx_hysteresis(struct amdxdna_dev_hdl *ndev, u32 timeout_us) > +{ > + struct aie4_msg_runtime_config_ctx_switch_hysteresis cfg = { > + .timeout_us = timeout_us, > + }; > + int ret; > + > + ret = aie4_set_runtime_cfg(ndev, AIE4_RUNTIME_CONFIG_CTX_SWITCH_HYSTERESIS, > + &cfg, sizeof(cfg)); > + if (ret) > + XDNA_WARN(ndev->aie.xdna, > + "Failed to set ctx switch hysteresis to %u us (%d), using fw default", > + timeout_us, ret); > + else > + XDNA_DBG(ndev->aie.xdna, "Context switch hysteresis set to %u us", timeout_us); > + > + return ret; > +} > diff --git a/drivers/accel/amdxdna/aie4_msg_priv.h b/drivers/accel/amdxdna/aie4_msg_priv.h > index fe78df9e23c8..636bf8d04c76 100644 > --- a/drivers/accel/amdxdna/aie4_msg_priv.h > +++ b/drivers/accel/amdxdna/aie4_msg_priv.h > @@ -12,6 +12,7 @@ > enum aie4_msg_opcode { > AIE4_MSG_OP_IDENTIFY = 0x10002, > AIE4_MSG_OP_SUSPEND = 0x10003, > + AIE4_MSG_OP_SET_RUNTIME_CONFIG = 0x10007, > AIE4_MSG_OP_QUERY_CERT_FIRMWARE_VERSION = 0x1000F, > > AIE4_MSG_OP_CREATE_VFS = 0x20001, > @@ -65,6 +66,29 @@ struct aie4_msg_suspend_resp { > enum aie4_msg_status status; > } __packed; > > +/* Type selector for AIE4_MSG_OP_SET_RUNTIME_CONFIG. */ > +enum aie4_msg_runtime_config_type { > + AIE4_RUNTIME_CONFIG_CTX_SWITCH_HYSTERESIS = 0xD, > + AIE4_MAX_RUNTIME_CONFIG > +}; > + > +struct aie4_msg_set_runtime_cfg_req { > + __u32 type; > + __u8 data[4]; > +} __packed; > + > +struct aie4_msg_set_runtime_cfg_resp { > + enum aie4_msg_status status; > +} __packed; > + > +/* Maximum payload for runtime config firmware message. */ > +#define AIE4_RUNTIME_CFG_MAX_DATA_SIZE 16 > + > +/* Context switch hysteresis timeout in microseconds (0 disables). */ > +struct aie4_msg_runtime_config_ctx_switch_hysteresis { > + __u32 timeout_us; > +} __packed; > + > struct aie4_msg_create_vfs_req { > __u32 vf_cnt; > } __packed; > diff --git a/drivers/accel/amdxdna/aie4_pci.c b/drivers/accel/amdxdna/aie4_pci.c > index 5593dfb6c7ed..446ab2f47c7d 100644 > --- a/drivers/accel/amdxdna/aie4_pci.c > +++ b/drivers/accel/amdxdna/aie4_pci.c > @@ -5,8 +5,10 @@ > > #include > #include > +#include > #include > #include > +#include > #include > #include > > @@ -322,6 +324,22 @@ int aie4_restore_power_mode(struct amdxdna_dev_hdl *ndev) > return aie4_msg_set_power_mode(ndev, ndev->pw_mode); > } > > +static int aie4_config_fw(struct amdxdna_dev_hdl *ndev) > +{ > + int ret; > + > + ret = aie4_attach_work_buffer(ndev); > + if (ret) > + return ret; > + > + /* Best-effort tuning knob; failure is warned inside and does not fail hw start */ > + ret = aie4_set_ctx_hysteresis(ndev, ndev->ctx_switch_hysteresis_us); > + if (ret == -ETIME) > + return ret; > + > + return 0; > +} > + > static int aie4_pf_hw_start(struct amdxdna_dev_hdl *ndev) > { > int ret; > @@ -334,7 +352,7 @@ static int aie4_pf_hw_start(struct amdxdna_dev_hdl *ndev) > if (ret) > goto stop_fw; > > - ret = aie4_attach_work_buffer(ndev); > + ret = aie4_config_fw(ndev); > if (ret) > goto mbox_fini; > > @@ -418,7 +436,7 @@ static int aie4_classic_hw_start(struct amdxdna_dev_hdl *ndev) > if (ret) > goto mailbox_fini; > > - ret = aie4_attach_work_buffer(ndev); > + ret = aie4_config_fw(ndev); > if (ret) > goto mailbox_fini; > > @@ -573,6 +591,7 @@ static int aie4m_pcidev_init(struct amdxdna_dev *xdna) > > ndev->priv = xdna->dev_info->dev_priv; > ndev->aie.xdna = xdna; > + ndev->ctx_switch_hysteresis_us = AIE4_CTX_HYSTERESIS_US; > ndev->pw_mode = POWER_MODE_DEFAULT; > xdna->dev_handle = ndev; > > @@ -918,15 +937,74 @@ static void aie4_classic_fini(struct amdxdna_dev *xdna) > aie4_free_work_buffer(xdna->dev_handle); > } > > +static int aie4_ctx_hysteresis_get(void *data, u64 *val) > +{ > + struct amdxdna_dev_hdl *ndev = data; > + struct amdxdna_dev *xdna = ndev->aie.xdna; > + > + guard(mutex)(&xdna->dev_lock); > + *val = ndev->ctx_switch_hysteresis_us; > + > + return 0; > +} > + > +static int aie4_ctx_hysteresis_set(void *data, u64 val) > +{ > + struct amdxdna_dev_hdl *ndev = data; > + struct amdxdna_dev *xdna = ndev->aie.xdna; > + int ret, idx; > + > + if (val > U32_MAX) > + return -EINVAL; > + > + if (!drm_dev_enter(&xdna->ddev, &idx)) > + return -ENODEV; > + > + mutex_lock(&xdna->dev_lock); > + > + ret = amdxdna_pm_resume_get_locked(xdna); > + if (ret) > + goto unlock; > + > + ret = aie4_set_ctx_hysteresis(ndev, (u32)val); > + if (!ret) > + ndev->ctx_switch_hysteresis_us = (u32)val; > + > + amdxdna_pm_suspend_put(xdna); > + > +unlock: > + mutex_unlock(&xdna->dev_lock); > + drm_dev_exit(idx); > + > + return ret; > +} > + > +/* Context switch hysteresis timeout in microseconds; 0 disables hysteresis. */ > +DEFINE_DEBUGFS_ATTRIBUTE(aie4_ctx_hysteresis_fops, aie4_ctx_hysteresis_get, > + aie4_ctx_hysteresis_set, "%llu\n"); > + > +static void aie4_debugfs_init(struct amdxdna_dev *xdna) > +{ > + struct amdxdna_dev_hdl *ndev = xdna->dev_handle; > + > + /* Context switch hysteresis is only supported on PF and classic devices. */ > + if (!to_pci_dev(xdna->ddev.dev)->is_virtfn) > + debugfs_create_file_unsafe("ctx_switch_hysteresis_us", 0600, > + xdna->ddev.accel->debugfs_root, ndev, > + &aie4_ctx_hysteresis_fops); > +} > + > const struct amdxdna_dev_ops aie4_pf_ops = { > .init = aie4_pf_init, > .fini = aie4_pf_fini, > + .debugfs_init = aie4_debugfs_init, > .sriov_configure = aie4_sriov_configure, > }; > > const struct amdxdna_dev_ops aie4_vf_ops = { > .init = aie4_vf_init, > .fini = aie4_vf_fini, > + .debugfs_init = aie4_debugfs_init, > .hwctx_init = aie4_hwctx_init, > .hwctx_fini = aie4_hwctx_fini, > .cmd_wait = aie4_cmd_wait, > @@ -937,6 +1015,7 @@ const struct amdxdna_dev_ops aie4_vf_ops = { > const struct amdxdna_dev_ops aie4_classic_ops = { > .init = aie4_classic_init, > .fini = aie4_classic_fini, > + .debugfs_init = aie4_debugfs_init, > .hwctx_init = aie4_hwctx_init, > .hwctx_fini = aie4_hwctx_fini, > .cmd_wait = aie4_cmd_wait, > diff --git a/drivers/accel/amdxdna/aie4_pci.h b/drivers/accel/amdxdna/aie4_pci.h > index 6e9e7f874a44..959ef3695813 100644 > --- a/drivers/accel/amdxdna/aie4_pci.h > +++ b/drivers/accel/amdxdna/aie4_pci.h > @@ -14,6 +14,9 @@ > #include "aie4_msg_priv.h" > #include "amdxdna_mailbox.h" > > +/* Default context switch hysteresis timeout in microseconds. */ > +#define AIE4_CTX_HYSTERESIS_US 1000 > + > struct cert_comp { > struct amdxdna_dev_hdl *ndev; > u32 msix_idx; > @@ -69,6 +72,9 @@ struct amdxdna_dev_hdl { > > u8 pw_mode; > > + /* Context switch hysteresis timeout in microseconds. */ > + u32 ctx_switch_hysteresis_us; > + > struct amdxdna_drm_query_firmware_version cert_version; > }; > > @@ -92,6 +98,9 @@ int aie4_init_dpm_freq_table(struct amdxdna_dev_hdl *ndev); > int aie4_query_dpm_level(struct amdxdna_dev_hdl *ndev, > u32 *aieclk_dpm_level, u32 *npuhclk_dpm_level); > int aie4_msg_set_power_mode(struct amdxdna_dev_hdl *ndev, u8 power_mode); > +int aie4_set_runtime_cfg(struct amdxdna_dev_hdl *ndev, u32 type, > + const void *data, size_t size); > +int aie4_set_ctx_hysteresis(struct amdxdna_dev_hdl *ndev, u32 timeout_us); > u32 aie4_msg_pasid(struct amdxdna_client *client); > > /* aie4_ctx.c */ > diff --git a/drivers/accel/amdxdna/amdxdna_debugfs.c b/drivers/accel/amdxdna/amdxdna_debugfs.c > index a6ec17c63629..1f63cc91b168 100644 > --- a/drivers/accel/amdxdna/amdxdna_debugfs.c > +++ b/drivers/accel/amdxdna/amdxdna_debugfs.c > @@ -126,4 +126,7 @@ void amdxdna_debugfs_init(struct amdxdna_dev *xdna) > xdna, > amdxdna_dbgfs_files[i].fops); > } > + > + if (xdna->dev_info->ops->debugfs_init) > + xdna->dev_info->ops->debugfs_init(xdna); > } > diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.h b/drivers/accel/amdxdna/amdxdna_pci_drv.h > index 953bf783b3f7..11f46ec738d7 100644 > --- a/drivers/accel/amdxdna/amdxdna_pci_drv.h > +++ b/drivers/accel/amdxdna/amdxdna_pci_drv.h > @@ -54,6 +54,7 @@ struct amdxdna_sched_job; > struct amdxdna_dev_ops { > int (*init)(struct amdxdna_dev *xdna); > void (*fini)(struct amdxdna_dev *xdna); > + void (*debugfs_init)(struct amdxdna_dev *xdna); Reviewed-by: Lizhi Hou > int (*resume)(struct amdxdna_dev *xdna); > int (*suspend)(struct amdxdna_dev *xdna); > int (*sriov_configure)(struct amdxdna_dev *xdna, int num_vfs);