From: "Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>
To: "CK Hu (胡俊光)" <ck.hu@mediatek.com>,
"jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
"Jason-ch Chen (陳建豪)" <Jason-ch.Chen@mediatek.com>,
"Shawn Sung (宋孝謙)" <Shawn.Sung@mediatek.com>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"angelogioacchino.delregno@collabora.com"
<angelogioacchino.delregno@collabora.com>
Subject: Re: [RESEND, PATCH 5/5] mailbox: mtk-cmdq: Add support runtime get and set GCE event
Date: Mon, 4 Mar 2024 15:50:05 +0000 [thread overview]
Message-ID: <ceab73ebb925dacc14376f7054e20411612b507e.camel@mediatek.com> (raw)
In-Reply-To: <1d14bad104b8e5c74ffe6c08cbafb4da6e1e751a.camel@mediatek.com>
Hi CK,
Thanks for the reviews.
On Mon, 2024-03-04 at 02:30 +0000, CK Hu (胡俊光) wrote:
> Hi, Jason:
>
> On Fri, 2024-03-01 at 22:44 +0800, Jason-JH.Lin wrote:
> > ISP drivers need to get and set GCE event in their runtime contorl
> > flow.
> > So add these functions to support get and set GCE by CPU.
> >
> > Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> > ---
> > drivers/mailbox/mtk-cmdq-mailbox.c | 37
> > ++++++++++++++++++++++++
> > include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++
> > 2 files changed, 39 insertions(+)
> >
> > diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
> > b/drivers/mailbox/mtk-cmdq-mailbox.c
> > index ead2200f39ba..d7c08249c898 100644
> > --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> > +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> > @@ -25,7 +25,11 @@
> > #define CMDQ_GCE_NUM_MAX (2)
> >
> > #define CMDQ_CURR_IRQ_STATUS 0x10
> > +#define CMDQ_SYNC_TOKEN_ID 0x60
> > +#define CMDQ_SYNC_TOKEN_VALUE 0x64
> > +#define CMDQ_TOKEN_ID_MASK GENMASK(9, 0)
> > #define CMDQ_SYNC_TOKEN_UPDATE 0x68
> > +#define CMDQ_TOKEN_UPDATE_VALUE BIT(16)
> > #define CMDQ_THR_SLOT_CYCLES 0x30
> > #define CMDQ_THR_BASE 0x100
> > #define CMDQ_THR_SIZE 0x80
> > @@ -83,6 +87,7 @@ struct cmdq {
> > struct cmdq_thread *thread;
> > struct clk_bulk_data clocks[CMDQ_GCE_NUM_MAX];
> > bool suspended;
> > + spinlock_t event_lock; /* lock for gce event */
> > };
> >
> > struct gce_plat {
> > @@ -113,6 +118,38 @@ u8 cmdq_get_shift_pa(struct mbox_chan *chan)
> > }
> > EXPORT_SYMBOL(cmdq_get_shift_pa);
> >
> > +void cmdq_set_event(void *chan, u16 event_id)
>
> struct mbox_chan *chan
>
OK, I'll change it.
> Is the event_id the hardware event id listed in include/dt-
> bindings/gce
> ? I mean CPU could trigger the event which should be trigger by
> hardware?
>
Yes, this can also trigger the hardware event, but CMDQ user should not
do that. Otherwise, it will cause error in other GCE threads that use
this hardware event.
> > +{
> > + struct cmdq *cmdq = container_of(((struct mbox_chan *)chan)-
> > > mbox,
> >
> > + typeof(*cmdq), mbox);
> > + unsigned long flags;
> > +
> > + spin_lock_irqsave(&cmdq->event_lock, flags);
> > +
> > + writel(CMDQ_TOKEN_UPDATE_VALUE | event_id, cmdq->base +
> > CMDQ_SYNC_TOKEN_UPDATE);
> > +
> > + spin_unlock_irqrestore(&cmdq->event_lock, flags);
> > +}
> > +EXPORT_SYMBOL(cmdq_set_event);
> > +
> > +u32 cmdq_get_event(void *chan, u16 event_id)
>
> Does this get the event status? I think event has only two status,
> set
> or cleared. So I would like this to return true for set and false for
> cleared.
Yes, the event status is 1 or 0. I'll change it to boolean.
Regards,
Jason-JH.Lin
>
> Regards,
> CK
>
next prev parent reply other threads:[~2024-03-04 15:50 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-01 14:43 [RESEND, PATCH 0/5] Add CMDQ API for upcoming ISP feature Jason-JH.Lin
2024-03-01 14:43 ` [RESEND, PATCH 1/5] soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE Jason-JH.Lin
2024-03-01 14:44 ` [RESEND, PATCH 2/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_mem_move() function Jason-JH.Lin
2024-03-04 2:39 ` CK Hu (胡俊光)
2024-03-04 15:52 ` Jason-JH Lin (林睿祥)
2024-03-01 14:44 ` [RESEND, PATCH 3/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function Jason-JH.Lin
2024-03-04 3:11 ` CK Hu (胡俊光)
2024-03-04 16:04 ` Jason-JH Lin (林睿祥)
2024-03-05 3:26 ` CK Hu (胡俊光)
2024-03-05 3:37 ` Jason-JH Lin (林睿祥)
2024-03-05 3:51 ` CK Hu (胡俊光)
2024-03-05 6:23 ` Jason-JH Lin (林睿祥)
2024-03-01 14:44 ` [RESEND, PATCH 4/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_acquire_event() function Jason-JH.Lin
2024-03-04 2:11 ` CK Hu (胡俊光)
2024-03-04 15:39 ` Jason-JH Lin (林睿祥)
2024-03-01 14:44 ` [RESEND, PATCH 5/5] mailbox: mtk-cmdq: Add support runtime get and set GCE event Jason-JH.Lin
2024-03-04 2:30 ` CK Hu (胡俊光)
2024-03-04 15:50 ` Jason-JH Lin (林睿祥) [this message]
2024-03-05 3:31 ` CK Hu (胡俊光)
2024-03-05 3:43 ` Jason-JH Lin (林睿祥)
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