From: Mario Limonciello <superm1@kernel.org>
To: Niklas Cassel <cassel@kernel.org>
Cc: Mario Limonciello <mario.limonciello@amd.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Damien Le Moal <dlemoal@kernel.org>,
Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
"open list:PCI SUBSYSTEM" <linux-pci@vger.kernel.org>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
"open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)"
<linux-ide@vger.kernel.org>
Subject: Re: [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing
Date: Tue, 22 Sep 2026 05:44:00 -0500 [thread overview]
Message-ID: <ced777dc-f813-456d-8296-6d3365c7a446@kernel.org> (raw)
In-Reply-To: <arJPQ2cEBgy3oxe2@ryzen>
On 9/22/26 04:49, Niklas Cassel wrote:
> On Sun, Sep 20, 2026 at 11:52:08PM -0500, Mario Limonciello wrote:
>> On 9/8/26 2:05 PM, Mario Limonciello wrote:
>>> An issue has been reported by a number of people that corruption
>>> was occurring on storage for desktop systems. It's notably reported
>>> on SATA, but the same issue also appears on NVME.
>>>
>>> At a glance it looks like an IOMMU issue as turning off the IOMMU helps
>>> the issue, but it's actually a problem that occurs specifically with any
>>> IOVA addressed >58 bits.
>>>
>>> This is because the BIOS on these systems is enabling a feature of the
>>> root port called 'enhanced atomics' which repurposes those upper 5 bits
>>> of address space. That feature should only be enabled by the BIOS when
>>> the partner device supports it, but it's instead needlessly enabled on a
>>> number of root ports.
>>>
>>> As some of these systems probably won't receive BIOS updates and there is
>>> active reports of data corruption root caused to this add a quirk to
>>> disable it on affected models, and also remove the quirk that was
>>> introduced to work around this issue in drivers/ata.
>>>
>>> v2:
>>> * Added resume fixups for the affected AMD PCIe ports
>>>
>>> Mario Limonciello (2):
>>> x86/PCI: Disable enhanced atomics on some AMD PCIe ports
>>> Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585"
>>>
>>> arch/x86/pci/fixup.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
>>> drivers/ata/ahci.c | 18 --------
>>> 2 files changed, 99 insertions(+), 18 deletions(-)
>>>
>>
>> Gentle ping on this series.
>
> I can pick up patch 2/2, but want to wait until patch 1/2 has been picked
> up either by Bjorn, or one of the x86 maintainers.
>
>
> Kind regards,
> Niklas
I think it would be better that this all goes through one tree so we
don't end up with a situation that someone has the revert but not the fix.
So maybe better to leave an A-b tag on 2/2 and then let pci or tip pick
up the series.
prev parent reply other threads:[~2026-09-22 10:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 19:05 Mario Limonciello
2026-09-08 19:05 ` [PATCH v2 1/2] x86/PCI: Disable enhanced atomics on some AMD PCIe ports Mario Limonciello
2026-09-14 16:57 ` Mario Limonciello
2026-09-08 19:06 ` [PATCH v2 2/2] Revert "ata: ahci: force 32-bit DMA for JMicron JMB582/JMB585" Mario Limonciello
2026-09-22 12:52 ` Niklas Cassel
2026-09-21 4:52 ` [PATCH v2 0/2] Fix for storage corruption w/ AMD IOMMU on 64-bit addressing Mario Limonciello
2026-09-22 9:49 ` Niklas Cassel
2026-09-22 10:44 ` Mario Limonciello [this message]
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