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From: Neil Armstrong <neil.armstrong@linaro.org>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/2] arm64: dts: qcom: sm8650: drop cpu thermal passive trip points
Date: Mon, 3 Feb 2025 09:23:30 +0100	[thread overview]
Message-ID: <cf5f9a36-db3a-46e8-aa61-a46a06b1f446@linaro.org> (raw)
In-Reply-To: <80948a6f-1cd4-47b3-9218-f5ab0c25eb3b@oss.qualcomm.com>

On 01/02/2025 16:41, Konrad Dybcio wrote:
> On 29.01.2025 10:43 AM, Neil Armstrong wrote:
>> On the SM8650, the dynamic clock and voltage scaling (DCVS) is done in an
>> hardware controlled loop using the LMH and EPSS blocks with constraints and
>> OPPs programmed in the board firmware.
>>
>> Since the Hardware does a better job at maintaining the CPUs temperature
>> in an acceptable range by taking in account more parameters like the die
>> characteristics or other factory fused values, it makes no sense to try
>> and reproduce a similar set of constraints with the Linux cpufreq thermal
>> core.
>>
>> In addition, the tsens IP is responsible for monitoring the temperature
>> across the SoC and the current settings will heavily trigger the tsens
>> UP/LOW interrupts if the CPU temperatures reaches the hardware thermal
>> constraints which are currently defined in the DT. And since the CPUs
>> are not hooked in the thermal trip points, the potential interrupts and
>> calculations are a waste of system resources.
>>
>> Drop the current passive trip points and only leave the critical trip
>> point that will trigger a software system reboot before an hardware
>> thermal shutdown in the allmost impossible case the hardware DCVS cannot
>> handle the temperature surge.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8650.dtsi | 180 -----------------------------------
>>   1 file changed, 180 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> index 25e47505adcb790d09f1d2726386438487255824..95509ce2713d4fcc3dbe0c5cd5827312d5681af4 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> @@ -5751,18 +5751,6 @@ cpu2-top-thermal {
>>   			thermal-sensors = <&tsens0 5>;
>>   
>>   			trips {
>> -				trip-point0 {
>> -					temperature = <90000>;
>> -					hysteresis = <2000>;
>> -					type = "passive";
>> -				};
> 
> Feel free to drop polling-delay-passive from these nodes too

Good catch

Neil

> 
> Konrad


  reply	other threads:[~2025-02-03  8:23 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-29  9:43 [PATCH v3 0/2] arm64: dts: qcom: sm8650: rework CPU & GPU thermal zones Neil Armstrong
2025-01-29  9:43 ` [PATCH v3 1/2] arm64: dts: qcom: sm8650: drop cpu thermal passive trip points Neil Armstrong
2025-02-01 15:41   ` Konrad Dybcio
2025-02-03  8:23     ` Neil Armstrong [this message]
2025-01-29  9:43 ` [PATCH v3 2/2] arm64: dts: qcom: sm8650: setup gpu thermal with higher temperatures Neil Armstrong
2025-01-29 14:41   ` Neil Armstrong
2025-02-01 15:37     ` Konrad Dybcio
2025-02-03  8:23       ` neil.armstrong
2025-02-03 13:07         ` Konrad Dybcio

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