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Wed, 14 Jan 2026 23:46:18 -0600 Received: from [172.24.31.151] (lt5cd2489kgj.dhcp.ti.com [172.24.31.151]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 60F5kEb0900017; Wed, 14 Jan 2026 23:46:15 -0600 Message-ID: Date: Thu, 15 Jan 2026 11:16:14 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/2] arm64: dts: ti: k3-am62p-j722s-common-main: Add HSM M4F node To: "Padhi, Beleswar" , , , , , , CC: , , , , References: <20260114173551.2545088-1-b-padhi@ti.com> <20260114173551.2545088-3-b-padhi@ti.com> <3a62d6f7-ff88-4f5a-8dfd-ded3e5ff1c86@ti.com> Content-Language: en-US From: "Kumar, Udit" In-Reply-To: <3a62d6f7-ff88-4f5a-8dfd-ded3e5ff1c86@ti.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CDD:EE_|DM3PPFEACE3F2B7:EE_ X-MS-Office365-Filtering-Correlation-Id: 73fa50bb-bb8c-4efd-9249-08de53f96875 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|34020700016|1800799024; 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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jan 2026 05:46:19.6411 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 73fa50bb-bb8c-4efd-9249-08de53f96875 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CDD.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFEACE3F2B7 On 1/15/2026 11:11 AM, Padhi, Beleswar wrote: > Hi Udit, > > On 1/15/2026 10:06 AM, Kumar, Udit wrote: >> Hi Beleswar, >> >> On 1/14/2026 11:05 PM, Beleswar Padhi wrote: >>> The TI K3 AM62P and J722S SoCs have a HSM (High Security Module) M4F >>> core in the MAIN Voltage Domain which could be used to run secure >>> services like Authentication. Add Device Tree Node definitions for the >>> HSM core in the respective SoC common main dtsi file. >>> >>> The HSM node is reserved to be loaded and booted by the early-stage >>> bootloader. The firmware-name property is defined at the SoC level >>> since the HSM is not a general-purpose remote core and boards are >>> unlikely to use separate firmware. If needed in exceptional cases, >>> board-specific device trees can override this property. >>> >>> The corresponding reg ranges of HSM node has also been added to its >>> parent node's (cbass_main bus) ranges property. >>> >>> Signed-off-by: Beleswar Padhi >>> --- >>> v3: Changelog: >>> [Nishanth]: >>>   1. Use generic node name 'remoteproc' >>>   2. Use label 'hsm' instead of 'hsm_m4fss' >>>   3. Add a comment for separate SRAMs >>>   4. Update firmware-name property to match existing naming conventions >>>   5. Change status to 'reserved' and add a commment >>>   6. Re-order bootph-pre-ram property before vendor properties >>>   7. Update commit msg adding rationale for firmware-name in SoC.dtsi >>> >>> Link to v2: >>> https://lore.kernel.org/all/20260106104755.948086-4-b-padhi@ti.com/ >>> >>> v2: Changelog: >>> 1. None >>> >>> Link to v1: >>> https://lore.kernel.org/all/20251231165102.950644-4-b-padhi@ti.com/ >>> >>>   .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 17 >>> +++++++++++++++++ >>>   arch/arm64/boot/dts/ti/k3-am62p.dtsi            |  1 + >>>   arch/arm64/boot/dts/ti/k3-j722s-main.dtsi       |  5 +++++ >>>   arch/arm64/boot/dts/ti/k3-j722s.dtsi            |  1 + >>>   4 files changed, 24 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi >>> b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi >>> index 3cf7c2b3ce2dd..0e1af2a69ca2e 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi >>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi >>> @@ -1117,4 +1117,21 @@ vpu: video-codec@30210000 { >>>           clocks = <&k3_clks 204 2>; >>>           power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>; >>>       }; >>> + >>> +    hsm: remoteproc@43c00000 { >>> +        compatible = "ti,hsm-m4fss"; >>> +        /* contiguous regions but instantiated separately in HW */ >>> +        reg = <0x00 0x43c00000 0x00 0x20000>, >>> +              <0x00 0x43c20000 0x00 0x10000>, >>> +              <0x00 0x43c30000 0x00 0x10000>; >>> +        reg-names = "sram0_0", "sram0_1", "sram1"; >>> +        resets = <&k3_reset 225 1>; >>> +        firmware-name = "am62p-hsm-m4f-fw"; >> >> you don't need clock and power-domain for this ? > > > That info is abstracted out via ti-sci calls. ti_sci_cmd_get_device() > takes care of setting clocks and power domains for us. > > Same for other rprocs: > https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi#L178 > Is this specific handling for m4 core ? , I see other rproc got power at cluster level https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi#L1518 > > Thanks, > Beleswar > >> >> >>> +        bootph-pre-ram; >>> +        ti,sci = <&dmsc>; >>> +        ti,sci-dev-id = <225>; >>> +        ti,sci-proc-ids = <0x80 0xff>; >>> +        /* reserved for early-stage bootloader */ >>> +        status = "reserved"; >>> +    }; >>>   }; >>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p.dtsi >>> b/arch/arm64/boot/dts/ti/k3-am62p.dtsi >>> index e2c01328eb298..9d6266d6ddb82 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-am62p.dtsi >>> +++ b/arch/arm64/boot/dts/ti/k3-am62p.dtsi >>> @@ -96,6 +96,7 @@ cbass_main: bus@f0000 { >>>                <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* >>> USB1 DWC3 Core window */ >>>                <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* >>> SA3UL */ >>> [..]