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X-CSE-ConnectionGUID: 2vZK4EuJT5qwFz6A3g6QEA== X-CSE-MsgGUID: 7hPkGtf3QKqey5jllcX5fg== X-IronPort-AV: E=McAfee;i="6700,10204,11345"; a="51721535" X-IronPort-AV: E=Sophos;i="6.13,286,1732608000"; d="scan'208";a="51721535" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2025 10:51:55 -0800 X-CSE-ConnectionGUID: Kw+cwZ9nRNmoQImvv7FKPg== X-CSE-MsgGUID: bjeFwl9ETiCuHsD3QDNMfQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="113401022" Received: from tjmaciei-mobl5.ger.corp.intel.com (HELO [10.125.109.21]) ([10.125.109.21]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2025 10:51:55 -0800 Message-ID: Date: Fri, 14 Feb 2025 10:51:58 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 08/12] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing To: Rik van Riel , x86@kernel.org Cc: linux-kernel@vger.kernel.org, bp@alien8.de, peterz@infradead.org, dave.hansen@linux.intel.com, zhengqi.arch@bytedance.com, nadav.amit@gmail.com, thomas.lendacky@amd.com, kernel-team@meta.com, linux-mm@kvack.org, akpm@linux-foundation.org, jackmanb@google.com, jannh@google.com, mhklinux@outlook.com, andrew.cooper3@citrix.com, Manali Shukla References: <20250213161423.449435-1-riel@surriel.com> <20250213161423.449435-9-riel@surriel.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 2/13/25 08:13, Rik van Riel wrote: > In the page reclaim code, we only track the CPU(s) where the TLB needs > to be flushed, rather than all the individual mappings that may be getting > invalidated. > > Use broadcast TLB flushing when that is available. The changelog here is a little light. This patch is doing a *ton* of stuff. The existing code has two cases where it is doing a full TLB flush, not a ranged flush. 1. An actual IPI to some CPUs in batch->cpumask 2. A local flush, no IPI The change here eliminates both of those options, even the "common case" which is not sending an IPI at all. So this replaces a CPU-local (aka. 1 logical CPU) TLB flush with a broadcast to the *ENTIRE* system. That's a really really big change to not be noted. It's not something that's an obvious win to me. > diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c > index 3c29ef25dce4..de3f6e4ed16d 100644 > --- a/arch/x86/mm/tlb.c > +++ b/arch/x86/mm/tlb.c > @@ -1316,7 +1316,9 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) > * a local TLB flush is needed. Optimize this use-case by calling > * flush_tlb_func_local() directly in this case. > */ > - if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids) { > + if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) { > + invlpgb_flush_all_nonglobals(); > + } else if (cpumask_any_but(&batch->cpumask, cpu) < nr_cpu_ids) { > flush_tlb_multi(&batch->cpumask, info); > } else if (cpumask_test_cpu(cpu, &batch->cpumask)) { > lockdep_assert_irqs_enabled(); The structure of the code is also a bit off to me. O'd kinda prefer that we stick the pattern of (logically): if (cpu_feature_enabled(X86_FEATURE_INVLPGB)) { invlpgb_...(); } else { on_each_cpu*(); } This patch is going a couple of functions up in the call chain above the on_each_cpu()'s. It would be more consistent with the previous modifications in this series if the X86_FEATURE_INVLPGB check was in native_flush_tlb_multi(), instead. Would that make sense here? It would also preserve the "common case" optimization that's in arch_tlbbatch_flush().