From: Shawn Lin <shawn.lin@rock-chips.com>
To: "Anand Moon" <linux.amoon@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Niklas Cassel" <cassel@kernel.org>,
"Hans Zhang" <18255117159@163.com>,
"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>,
"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS"
<linux-pci@vger.kernel.org>,
"moderated list:ARM/Rockchip SoC support"
<linux-arm-kernel@lists.infradead.org>,
"open list:ARM/Rockchip SoC support"
<linux-rockchip@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Cc: shawn.lin@rock-chips.com
Subject: Re: [PATCH v1 2/2] PCI: dw-rockchip: Add runtime PM support to Rockchip PCIe driver
Date: Tue, 28 Oct 2025 08:44:34 +0800 [thread overview]
Message-ID: <cfaa4824-a59a-4106-b2c1-befce2af0324@rock-chips.com> (raw)
In-Reply-To: <20251027145602.199154-3-linux.amoon@gmail.com>
在 2025/10/27 星期一 22:55, Anand Moon 写道:
> Add runtime power management support to the Rockchip DesignWare PCIe
> controller driver by enabling devm_pm_runtime() in the probe function.
> These changes allow the PCIe controller to suspend and resume dynamically,
> improving power efficiency on supported platforms.
>
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index b878ae8e2b3e..5026598d09f8 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -20,6 +20,7 @@
> #include <linux/of_irq.h>
> #include <linux/phy/phy.h>
> #include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> #include <linux/regmap.h>
> #include <linux/reset.h>
>
> @@ -690,6 +691,20 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> if (ret)
> goto deinit_phy;
>
> + ret = pm_runtime_set_suspended(dev);
> + if (ret)
> + goto disable_pm_runtime;
> +
> + ret = devm_pm_runtime_enable(dev);
> + if (ret) {
> + ret = dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
> + goto deinit_clk;
> + }
> +
> + ret = pm_runtime_resume_and_get(dev);
> + if (ret)
> + goto disable_pm_runtime;
> +
> switch (data->mode) {
> case DW_PCIE_RC_TYPE:
> ret = rockchip_pcie_configure_rc(pdev, rockchip);
> @@ -709,7 +724,10 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
>
> return 0;
>
> +disable_pm_runtime:
We need to call reset_control_assert(rockchip->rst) before releasing the
the pm refcount. The problem we faced on vendor kernel is there might be
still on-going transaction from IP to the AXI which blocks genpd to be
powered down.
> + pm_runtime_disable(dev);
> deinit_clk:
> + pm_runtime_no_callbacks(dev);
> clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
> deinit_phy:
> rockchip_pcie_phy_deinit(rockchip);
> @@ -725,6 +743,9 @@ static void rockchip_pcie_remove(struct platform_device *pdev)
> /* Perform other cleanups as necessary */
> clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
> rockchip_pcie_phy_deinit(rockchip);
> + pm_runtime_put_sync(dev);
> + pm_runtime_disable(dev);
> + pm_runtime_no_callbacks(dev);
> }
>
> static const struct rockchip_pcie_of_data rockchip_pcie_rc_of_data_rk3568 = {
next prev parent reply other threads:[~2025-10-28 1:00 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-27 14:55 [PATCH v1 0/2] Add runtime PM support to Rockchip DW " Anand Moon
2025-10-27 14:55 ` [PATCH v1 1/2] PCI: dw-rockchip: Add remove callback for resource cleanup Anand Moon
2025-10-27 15:12 ` Nicolas Frattaroli
2025-10-27 16:31 ` Anand Moon
2025-10-27 17:17 ` Nicolas Frattaroli
2025-10-28 0:26 ` Shawn Lin
2025-10-28 9:34 ` Anand Moon
2025-10-29 0:28 ` Shawn Lin
2025-10-29 6:24 ` Anand Moon
2025-10-31 8:36 ` Manivannan Sadhasivam
2025-10-31 12:29 ` Nicolas Frattaroli
2025-10-31 15:08 ` Manivannan Sadhasivam
2025-10-27 14:55 ` [PATCH v1 2/2] PCI: dw-rockchip: Add runtime PM support to Rockchip PCIe driver Anand Moon
2025-10-28 0:44 ` Shawn Lin [this message]
2025-10-28 9:34 ` Anand Moon
2025-10-31 8:39 ` Manivannan Sadhasivam
2025-10-31 14:03 ` Anand Moon
2025-10-31 14:53 ` Manivannan Sadhasivam
2025-11-01 8:09 ` Anand Moon
2025-10-27 15:06 ` [PATCH v1 0/2] Add runtime PM support to Rockchip DW " Nicolas Frattaroli
2025-10-29 6:29 ` Anand Moon
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